Sujet : Re: Is Intel exceptionally unsuccessful as an architecture designer?
De : already5chosen (at) *nospam* yahoo.com (Michael S)
Groupes : comp.archDate : 24. Sep 2024, 11:37:58
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <20240924123758.00000f32@yahoo.com>
References : 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
User-Agent : Claws Mail 3.19.1 (GTK+ 2.24.33; x86_64-w64-mingw32)
On Tue, 24 Sep 2024 00:45:22 -0000 (UTC)
Lawrence D'Oliveiro <
ldo@nz.invalid> wrote:
On Sun, 22 Sep 2024 10:34:16 +0300, Michael S wrote:
The difference between MPP and cluster is not well-defined.
The difference between ccNUMA and MPP-or-cluster is crystal clear.
If memory on other nodes were made directly addressable via hardware
that implemented something like a message-passing bus, suddenly the
difference is not so clear.
For as long as communication is not cache-coherent the difference vs
ccNUMA is still crystal clear.
I vaguely remember that in late 1990s Cray made computer of this sort,
a predecessor of later far more successful CRAY-XT3/4. The later had to
give up on direct addressability in order to scale for vastly higher
number of nodes and of total memory.
May be, Cray T3E ?