Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)

On Tue, 16 Apr 2024 6:23:47 +0000, David Brown wrote:

On 16/04/2024 02:35, Lawrence D'Oliveiro wrote:

On Sun, 14 Jan 2024 14:30:51 -0500, EricP wrote:
>

Furthermore, the address and data registers and buses are 16 bits and
the high 16-bits are shared ...

>
No, in the 68000 family the A- and D- registers are 32 bits.
>
If you compare the earlier members with the 68020 and later, it becomes
clear that the architecture was designed as full 32-bit from the
beginning, and then implemented in a cut-down form for the initial
16-bit
products. Going full 32-bit was just a matter of filling in the gaps.

>
Yes, the 68000 was designed to have full support for 32-bit types and a
32-bit future, but (primarily for cost reasons) used a 16-bit ALU and
16-bit buses internally and externally.

A 32-bit bus would have priced the 68K at 30%-50% higher simply
due to the number of pins on available packages. This would have
eliminated any chance at competing for the broad markets at that
time.

                                       Some 68000 compilers had 16-bit
int, some had 32-bit int, and some let you choose either, since 16-bit
types could be significantly faster on the 68000 even though the
general-purpose registers were 32-bit.

Just count the bus cycles.