Re: is Vax addressing sane today

Michael S <already5chosen@yahoo.com> writes:

On Mon, 07 Oct 2024 07:17:02 GMT
anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote:
>

 
However, in John Mashey's criteria the number of registers plays a
role; he requires >4 bits for the GPR specifier, and >3 bits for the
FPR specifier.
 
- anton

>
Which sounds rather arbitrary.

In a way it is, but see below.

Or even worse, like if he wanted for
SPARC to be called 'typical RISC' and for ARM to be called atypical and
had chosen the numbers to match the agenda.

I think that ARM did not exist for John Mashey.

He probably chose the criterion ">4 bits" because it excluded VAX.
So, yes, his criteria were based on classifying some architectures as
RISCs and some as CISCs, and then drawing the lines to fit that
classification.  But his criteria also work for architectures he did
not look at, including ARM A32, even if not every criterion agrees
with all the others for every architecture.

Alternatively, you could do a cluster analysis with these criteria and
maybe others, and I think that the RISCs would come out pretty tightly
clustered; the non-RISCs would be further away from that, and I doubt
that they would form a single cluster.

- anton
--
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>