Re: Interrupts in OoO

Scott Lurndal wrote:

Brett <ggtgp@yahoo.com> writes:

Anton Ertl <anton@mips.complang.tuwien.ac.at> wrote:

 

>
Your hardware guys are not interested because they know what you want is
not useful. ICE probes could give you more info, but that tech is highly
secret and dangerous for users to get

 There are close to a dozen 3rd-party devices that will attach to
the JTAG port and provide extremely low-level hardware state, including
individual flops and rams by reading the scan chains.  For AArch64,
all the interesting state is directly documented in the ARMv8 ARM
in the context of a JTAG-like implementation.
 Hardly "highly secret".
 Scan chains are clearly proprietary design data.
 

, and is fused off for your
protection.

 An option at manufacturing time, or later when the chip is integrated
into a platform, the platform vendor has the choice of fusing out the
JTAG/ICE port, which would make sense for a device that needs to be
highly secure (a firewall or crypto appliance, for example).
 

You don’t need such data, and would not understand such info if
you had it.

 Perhaps you might not undertstand it.  Likely most others here have direct
experience with scan chains, IDEs (or more likely VCS) et cetera.
 

I had a (quite expensive) ICE for my 386 computer, by the time the Pentium rolled out, large parts of that functionality had turned into the EMON counters, and so available to everyone who had signed an Intel NDA.
Byte July 1994 is where I documented my reverse engineering of those counters, it is (by far!) the most cited paper/article I have ever written. :-)
This showed Intel the error of their ways, and all subsequent cpus have documented those counters.
Terje
--
- <Terje.Mathisen at tmsw.no>
"almost all programming can be viewed as an exercise in caching"