Re: is Vax addressing sane today

EricP <ThatWouldBeTelling@thevillage.com> writes:

But then, risc processors mostly, started using exceptions for housekeeping
- SPARC for register window sliding, Alpha for byte, word and misaligned
memory access

On Alpha the assembler expands byte, word and unaligned access
mnemonics into sequences of machine instructions; if you compile for
BWX extensions, byte and word mnemonics get compiled into BWX
instructions.  If the machine does not have the BWX extensions and it
encounters a BWX instruction, the result is an illegal instruction
signal at least on Linux.  This terminates your typical program, so
it's not at all frequent.

Concerning unaligned accesses, if you use a load or store that
requires alignment, Digital OSF/1 (and the later versions with various
names) by default produced a signal rather than fixing it up, so again
programs are typically terminated, and the exception is not at all
frequent.  There is a system call and a tool (uac) that allows telling
the OS to fix up unaligned accesses, but it played no role in my
experience while I was still using Digital OSF/1 (including it's
successors).

On Linux the default behaviour was to fix up the unaligned accesses
and to log that in the system log.  There were a few such messages in
the log per day, so that obviously was not a frequent occurence,
either.  I wrote a program that allowed me to change the behaviour
<https://www.complang.tuwien.ac.at/anton/uace.c>, mainly because I
wanted to get a signal when an unaligned access happens.

As for the unaligned-access mnemonics, these were obviously barely
used: I found that gas generates wrong code for ustq several years
after Alpha was introduced, so obviously no software running under
Linux has used this mnemonic.

The solution for Alpha was to add back the byte and word instructions,
and add misaligned access support to all memory ops.

Alpha added BWX instructions, but not because it had used trapping to
emulate them earlier; Old or portable binaries continued to use
instruction sequences.  Alpha traps when you do, e.g., an unaligned
ldq in all Alpha implementations I have had contact with (up to a
800MHz 21264B).

- anton
--
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>