Re: 80286 protected mode

Liste des GroupesRevenir à c arch 
Sujet : Re: 80286 protected mode
De : david.brown (at) *nospam* hesbynett.no (David Brown)
Groupes : comp.arch
Date : 13. Oct 2024, 12:58:14
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <vegckn$ltgv$1@dont-email.me>
References : 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
User-Agent : Mozilla Thunderbird
On 12/10/2024 20:33, Brett wrote:
David Brown <david.brown@hesbynett.no> wrote:
On 12/10/2024 01:32, MitchAlsup1 wrote:
On Fri, 11 Oct 2024 22:02:32 +0000, David Brown wrote:
>
On 11/10/2024 20:55, MitchAlsup1 wrote:
On Fri, 11 Oct 2024 12:10:13 +0000, David Brown wrote:
>
>
Do you think you can just write this :
>
void * memmove(void * s1, const void  * s2, size_t n)
{
     return memmove(s1, s2, n);
}
>
in your library's source?
>
        .global memmove
memmove:
        MM     R2,R1,R3
        RET
>
sure !
>
You are either totally clueless, or you are trolling.  And I know you
are not clueless.
>
This discussion has become pointless.
>
The point is that there are a few things that may be hard to do
with {decode, pipeline, calculations, specifications...}; but
because they are so universally needed; these, too, should
"get into ISA".
>
One good reason to put them in ISA is to preserve the programmers
efforts over decades, so they don't have to re-write libc every-
time a new set of instructions come out.
>
Moving an arbitrary amount of memory from point a to point b
happens to fall into that universal need. Setting an arbitrary
amount of memory to a value also falls into that universal
need.
>
Again, I have to ask - do you bother to read the posts you reply to?
Are you interested in replying, and engaging in the discussion?  Or are
you just looking for a chance to promote your own architecture, no
matter how tenuous the connection might be to other posts?
>
Again, let me say that I agree with what you are saying - I agree that
an ISA should have instructions that are efficient for what people
actually want to do.  I agree that it is a good thing to have
instructions that let performance scale with advances in hardware
ideally without needing changes in compiled binaries, and at least
without needing changes in source code.
>
I believe there is an interesting discussion to be had here, and I would
enjoy hearing about comparisons of different ways things functions like
memcpy() and memset() can be implemented in different architectures and
optimised for different sizes, or how scalable vector instructions can
work in comparison to fixed-size SIMD instructions.
>
But at the moment, this potential is lost because you are posting total
shite about implementing memmove() in standard C.  It is disappointing
that someone with your extensive knowledge and experience cannot see
this.  I am finding it all very frustrating.
 There are only two decisions to make in memcpy, are the copies less than
copy sized aligned, and do the pointers overlap in copy size.
 
Are you confused about memcpy() and memmove()?  If so, let's clear that one up from the start.  For memcpy(), there are no overlap issues - the person using it promises that the source and destination areas do not overlap, and no one cares what might happen if they do.  For memmove(), the areas /may/ overlap, and the copy is done as though the source were copied first to a temporary area, and then from the temporary area to the destination.
For memcpy(), there can be several issues to consider for efficient implementations that can be skipped for a simple loop copying byte for byte.  An efficient implementation will probably want to copy with larger sizes, such as using 32-bit, 64-bit, or bigger registers.  For some targets, that is only possible for aligned data (and for some, unaligned accesses may be allowed but emulated by traps, making them massively slower than byte-by-byte accesses).  The best choice of size will be implementation and target dependent, as will methods of determining alignment (if that is relevant).  I'm guessing that by your somewhat muddled phrase "are the copies less than copy sized aligned", you meant something on those lines.
For memmove(), you generally also need to decide if your copy loop should run upwards or downwards, and that must be done in an implementation-dependent manner.  It is conceivable that for a target with more complex memory setups - perhaps allowing the same memory to be accessible in different ways via different segments - that this is not enough.

For hardware this simplifies down to perhaps two types of copies, easy and
hard.
For most targets, yes.

 If you make hard fast, and you will, then two versions is all you need, not
the dozens of choices with 1k of code you need in C.
 
That makes little sense.  What "1k of code" do you need in C? Implementations of memcpy() and memmove() are implementation and target-specific, not general portable standard C.  There is no single C implementation of these functions.
It is an obvious truism that if you have hardware instructions that can implement an efficient memcpy() and/or memmove() on a target, then the implementation-specific implementations of these functions on that target will be small, simple and efficient.

Often you know which of the two you want at compile time from the pointer
type.
 In short your complaints are wrong headed in not understanding what
hardware memcpy can do.
 
What complaints?  I haven't made any complains about implementing these functions.

Date Sujet#  Auteur
16 Apr 24 * Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)237Lawrence D'Oliveiro
16 Apr 24 `* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)236David Brown
16 Apr 24  +- Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)1MitchAlsup1
26 May 24  +- Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)1MitchAlsup1
1 Oct 24  `* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)233MitchAlsup1
1 Oct 24   `* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)232Thomas Koenig
1 Oct 24    +* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)225MitchAlsup1
2 Oct 24    i+* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)223Brett
3 Oct 24    ii`* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)222Lawrence D'Oliveiro
3 Oct 24    ii +- Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)1Brett
3 Oct 24    ii +- Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)1Anton Ertl
3 Oct 24    ii `* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)219David Brown
3 Oct 24    ii  `* Byte ordering (was: Whether something is RISC or not)218Anton Ertl
3 Oct 24    ii   +- Re: Byte ordering (was: Whether something is RISC or not)1David Brown
4 Oct 24    ii   +* Re: Byte ordering (was: Whether something is RISC or not)215Lawrence D'Oliveiro
4 Oct 24    ii   i+- Re: Byte ordering1Lynn Wheeler
4 Oct 24    ii   i+* Re: Byte ordering (was: Whether something is RISC or not)211David Brown
4 Oct 24    ii   ii`* Re: Byte ordering (was: Whether something is RISC or not)210Anton Ertl
4 Oct 24    ii   ii +* Re: Byte ordering5BGB
5 Oct 24    ii   ii i`* Re: Byte ordering4MitchAlsup1
5 Oct 24    ii   ii i +* Re: Byte ordering2BGB
5 Oct 24    ii   ii i i`- Re: Byte ordering1Lawrence D'Oliveiro
5 Oct 24    ii   ii i `- Re: Byte ordering1Lawrence D'Oliveiro
5 Oct 24    ii   ii +* Re: Byte ordering (was: Whether something is RISC or not)13Lawrence D'Oliveiro
5 Oct 24    ii   ii i`* Re: Byte ordering (was: Whether something is RISC or not)12Brett
5 Oct 24    ii   ii i `* Re: Byte ordering (was: Whether something is RISC or not)11Anton Ertl
5 Oct 24    ii   ii i  `* Re: Byte ordering (was: Whether something is RISC or not)10Michael S
6 Oct 24    ii   ii i   +- Re: Byte ordering1Terje Mathisen
6 Oct 24    ii   ii i   `* Re: Byte ordering (was: Whether something is RISC or not)8Brett
7 Oct 24    ii   ii i    `* Re: Byte ordering (was: Whether something is RISC or not)7Lawrence D'Oliveiro
7 Oct 24    ii   ii i     `* Re: Byte ordering (was: Whether something is RISC or not)6Brett
7 Oct 24    ii   ii i      `* Re: Byte ordering (was: Whether something is RISC or not)5Michael S
7 Oct 24    ii   ii i       +* Re: Byte ordering2Stefan Monnier
7 Oct 24    ii   ii i       i`- Re: Byte ordering1Michael S
7 Oct 24    ii   ii i       `* Re: Byte ordering (was: Whether something is RISC or not)2Lawrence D'Oliveiro
8 Oct 24    ii   ii i        `- Re: Byte ordering1Terje Mathisen
6 Oct 24    ii   ii `* Re: Byte ordering191David Brown
6 Oct 24    ii   ii  `* Re: Byte ordering190Anton Ertl
6 Oct 24    ii   ii   `* Re: Byte ordering189John Dallman
7 Oct 24    ii   ii    +* Re: Byte ordering20Lawrence D'Oliveiro
8 Oct 24    ii   ii    i`* Re: Byte ordering19John Dallman
9 Oct 24    ii   ii    i +- VMS/NT memory management (was: Byte ordering)1Stefan Monnier
15 Oct 24    ii   ii    i +* Re: Byte ordering2Lawrence D'Oliveiro
15 Oct 24    ii   ii    i i`- Re: Byte ordering1MitchAlsup1
15 Oct 24    ii   ii    i `* Re: Byte ordering15Lawrence D'Oliveiro
15 Oct 24    ii   ii    i  +* Re: Byte ordering3Michael S
15 Oct 24    ii   ii    i  i+- Re: Byte ordering1John Dallman
18 Oct 24    ii   ii    i  i`- Re: Byte ordering1Lawrence D'Oliveiro
15 Oct 24    ii   ii    i  +* Re: Byte ordering9John Dallman
16 Oct 24    ii   ii    i  i+* Re: Byte ordering7George Neuner
16 Oct 24    ii   ii    i  ii`* Re: Byte ordering6Terje Mathisen
16 Oct 24    ii   ii    i  ii `* Re: Byte ordering5David Brown
17 Oct 24    ii   ii    i  ii  +* Re: Byte ordering2George Neuner
17 Oct 24    ii   ii    i  ii  i`- Re: Byte ordering1David Brown
17 Oct 24    ii   ii    i  ii  `* Re: clouds, not Byte ordering2John Levine
17 Oct 24    ii   ii    i  ii   `- Re: clouds, not Byte ordering1David Brown
18 Oct 24    ii   ii    i  i`- Re: Byte ordering1Lawrence D'Oliveiro
16 Oct 24    ii   ii    i  `* Re: Byte ordering2Paul A. Clayton
18 Oct 24    ii   ii    i   `- Re: Microkernels & Capabilities (was Re: Byte ordering)1Lawrence D'Oliveiro
7 Oct 24    ii   ii    `* 80286 protected mode168Anton Ertl
7 Oct 24    ii   ii     +* Re: 80286 protected mode5Lars Poulsen
7 Oct 24    ii   ii     i`* Re: 80286 protected mode4Terje Mathisen
7 Oct 24    ii   ii     i +- Re: 80286 protected mode1Michael S
7 Oct 24    ii   ii     i `* Re: 80286 protected mode2Lawrence D'Oliveiro
8 Oct 24    ii   ii     i  `- Re: 80286 protected mode1Terje Mathisen
7 Oct 24    ii   ii     +* Re: 80286 protected mode3Brett
7 Oct 24    ii   ii     i`* Re: 80286 protected mode2Michael S
7 Oct 24    ii   ii     i `- Re: 80286 protected mode1Brett
7 Oct 24    ii   ii     +- Re: 80286 protected mode1Lawrence D'Oliveiro
8 Oct 24    ii   ii     +* Re: 80286 protected mode152MitchAlsup1
8 Oct 24    ii   ii     i+* Re: 80286 protected mode4Lawrence D'Oliveiro
8 Oct 24    ii   ii     ii`* Re: 80286 protected mode3MitchAlsup1
9 Oct 24    ii   ii     ii +- Re: 80286 protected mode1David Brown
15 Oct 24    ii   ii     ii `- Re: 80286 protected mode1Lawrence D'Oliveiro
8 Oct 24    ii   ii     i`* Re: 80286 protected mode147Anton Ertl
8 Oct 24    ii   ii     i +- Re: 80286 protected mode1Robert Finch
9 Oct 24    ii   ii     i `* Re: 80286 protected mode145David Brown
9 Oct 24    ii   ii     i  +* Re: 80286 protected mode79MitchAlsup1
9 Oct 24    ii   ii     i  i`* Re: 80286 protected mode78David Brown
9 Oct 24    ii   ii     i  i `* Re: 80286 protected mode77Stephen Fuld
10 Oct 24    ii   ii     i  i  +* Re: 80286 protected mode2MitchAlsup1
10 Oct 24    ii   ii     i  i  i`- Re: 80286 protected mode1David Brown
10 Oct 24    ii   ii     i  i  +- Re: 80286 protected mode1David Brown
11 Oct 24    ii   ii     i  i  `* Re: 80286 protected mode73Tim Rentsch
15 Oct 24    ii   ii     i  i   `* Re: 80286 protected mode72Stefan Monnier
15 Oct 24    ii   ii     i  i    +* Re: 80286 protected mode30MitchAlsup1
16 Oct 24    ii   ii     i  i    i+* Re: 80286 protected mode25MitchAlsup1
16 Oct 24    ii   ii     i  i    ii+* Re: C and turtles, 80286 protected mode13John Levine
16 Oct 24    ii   ii     i  i    iii+* Re: C and turtles, 80286 protected mode7MitchAlsup1
16 Oct 24    ii   ii     i  i    iiii`* Re: C and turtles, 80286 protected mode6John Levine
17 Oct 24    ii   ii     i  i    iiii `* Re: C and turtles, 80286 protected mode5Thomas Koenig
20 Oct 24    ii   ii     i  i    iiii  `* Re: C and turtles, 80286 protected mode4Lawrence D'Oliveiro
20 Oct 24    ii   ii     i  i    iiii   `* Re: C and turtles, 80286 protected mode3George Neuner
22 Oct 24    ii   ii     i  i    iiii    `* Re: C and turtles, 80286 protected mode2Tim Rentsch
22 Oct 24    ii   ii     i  i    iiii     `- Re: C and turtles, 80286 protected mode1George Neuner
16 Oct 24    ii   ii     i  i    iii+- Re: C and turtles, 80286 protected mode1David Brown
16 Oct 24    ii   ii     i  i    iii`* Re: C and turtles, 80286 protected mode4Paul A. Clayton
17 Oct 24    ii   ii     i  i    iii +- Re: C and turtles, 80286 protected mode1David Brown
20 Oct 24    ii   ii     i  i    iii `* Re: C and turtles, 80286 protected mode2Lawrence D'Oliveiro
20 Oct 24    ii   ii     i  i    iii  `- Re: C and turtles, 80286 protected mode1Paul A. Clayton
16 Oct 24    ii   ii     i  i    ii+* Re: 80286 protected mode7Thomas Koenig
17 Oct 24    ii   ii     i  i    ii+* Re: 80286 protected mode3George Neuner
17 Oct 24    ii   ii     i  i    ii`- Re: 80286 protected mode1Tim Rentsch
16 Oct 24    ii   ii     i  i    i+* Re: 80286 protected mode3David Brown
17 Oct 24    ii   ii     i  i    i`- Re: 80286 protected mode1Tim Rentsch
16 Oct 24    ii   ii     i  i    `* Re: 80286 protected mode41David Brown
9 Oct 24    ii   ii     i  +* Re: 80286 protected mode51Thomas Koenig
13 Oct 24    ii   ii     i  `* Re: 80286 protected mode14Anton Ertl
8 Oct 24    ii   ii     `* Re: 80286 protected mode6John Levine
6 Oct 24    ii   i`* Re: Byte ordering (was: Whether something is RISC or not)2Michael S
4 Oct 24    ii   `- Re: Byte ordering (was: Whether something is RISC or not)1John Dallman
2 Oct 24    i`- Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)1Thomas Koenig
2 Oct 24    +* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)5David Schultz
3 Oct 24    `- Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)1Lawrence D'Oliveiro

Haut de la page

Les messages affichés proviennent d'usenet.

NewsPortal