Re: 80286 protected mode

Liste des GroupesRevenir à c arch 
Sujet : Re: 80286 protected mode
De : already5chosen (at) *nospam* yahoo.com (Michael S)
Groupes : comp.arch
Date : 19. Oct 2024, 17:46:41
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <20241019194641.0000213b@yahoo.com>
References : 1 2 3 4 5 6 7 8 9 10 11 12 13
User-Agent : Claws Mail 4.1.1 (GTK 3.24.34; x86_64-w64-mingw32)
On Fri, 18 Oct 2024 16:19:08 GMT
scott@slp53.sl.home (Scott Lurndal) wrote:

Michael S <already5chosen@yahoo.com> writes:
On Fri, 18 Oct 2024 14:06:17 GMT
scott@slp53.sl.home (Scott Lurndal) wrote:
 
Michael S <already5chosen@yahoo.com> writes: 
On Mon, 14 Oct 2024 19:39:41 GMT
scott@slp53.sl.home (Scott Lurndal) wrote:
  
mitchalsup@aol.com (MitchAlsup1) writes:   
On Mon, 14 Oct 2024 15:04:28 +0000, David Brown wrote:
    
On 13/10/2024 17:45, Anton Ertl wrote:     
    
I do think it would be convenient if there were a fully
standard way to compare independent pointers (other than
just for equality).  Rarely needing something does not mean
/never/ needing it.     
>
OK, take a segmented memory model with 16-bit pointers and a
24-bit virtual address space. How do you actually compare to
segmented pointers ??     
 
Depends.  On the Burroughs mainframe there could be eight
active segments and the segment number was part of the pointer.
 
Pointers were 32-bits (actually 8 BCD digits)
 
  S s OOOOOO
 
Where 'S' was a sign digit (C or D), 's' was the
segment number (0-7) and OOOOOO was the six digit
offset within the segment (500kB/1000kD each).
 
A particular task (process) could have up to
one million "environments", each environment
could have up to 100 "memory areas (up to 1000kD)
of which the first eight were loaded into the
processor base/limit registers.   Index registers
were 8 digits and were loaded with a pointer as
described above.   Operands could optionally select
one of the index registers and the operand address
was treated as an offset to the index register;
there were 7 index registers.
 
Access to memory areas 8-99 use string instructions
where the pointer was 16 BCD digits:
 
   EEEEEEMM SsOOOOOO
 
Where EEEEEE was the evironment number (0-999999);
environments starting with D00000 were reserved for
the MCP (Operating System).    MM was the memory area
number and the remaining eight digits described the
data within the memory area.  A subroutine call could
call within a memory area or switch to a new environment.
 
Memory area 1 was the code region for the segment,
Memory area 0 held the stack and some global variables
and was typically shared by all environments.
Memory areas 2-7 were application dependent and could
be configured to be shared between environments at
link time.   
>
What was the size of phiscal address space ?
I would suppose, more than 1,000,000 words?   
 
It varied based on the generation.  In the
1960s, a half megabyte (10^6 digits)
was the limit.
 
In the 1970s, the architecture supported
10^8 digits, the largest B4800 systems
were shipped with 2 million digits (1MB).
In 1979, the B4900 was introduced supporting
up to 10MB (20 MD), later increased to
20MB/40MD.
 
In the 1980s, the largest systems (V500)
supported up to 10^9 digits.  It
was that generation of machine where the
environment scheme was introduced.
 
Binaries compiled in 1966 ran on all
generations without recompilation.
 
There was room in the segmentation structures
for up to 10^18 digit physical addresses
(where the segments were aligned on 10^3
digit boundaries). 
>
So, can it be said that ar least some of B6500-compatible models 
 
No. The systems I described above are from the medium
systems family (B2000/B3000/B4000).

I didn't realize that you were not talking about Large Systems.
I didn't even know that Medium Systems used segmented memory.
Sorry.

The B5000/B6000/B7000
(large) family systems were a completely different stack based
architecture with a 48-bit word size.  The Small systems (B1000)
supported task-specific dynamic microcode loading (different
microcode for a cobol app vs. a fortran app).
 
Medium systems evolved from the Electrodata Datatron and 220 (1954)
through the Burroughs B300 to the Burroughs B3500 by 1965.  The B5000
was also developed at the old Electrodata plant in Pasadena
(where I worked in the 80s) - eventually large systems moved
out - the more capable large systems (B7XXX) were designed in
Tredyffrin Pa, the less capable large systems (B5XXX) were designed
in Mission Viejo, Ca.
 
suffered from the same problem as 80286 - the segment of maximal size
didn't cover all linear (or physical) address space?
Or their index register width was increased to accomodate 1e9 digits
in the single segment?
 
 
Unisys discontinued that line of systems in 1992. 
>
I thought it lasted longer. My impresion was that there were still
hardware implemntation (alongside with emulation on Xeons) sold up
until 15 years ago. 
 
Large systems still exist today in emulation[*], as do the
former Univac  (Sperry 2200) systems.   The last medium system
(V380) was retired by the City of Santa Ana in 2010 (almost two
decades after Unisys cancelled the product line) and was moved
to the Living Computer Museum.
 
City of Santa Ana replaced the single 1980 vintage V380 with
29 windows servers.
 
After the merger of Burroughs and Sperry in '86 there were six
different mainframe architectures - by 1990, all but
two (2200 and large systems) had been terminated.
 
[*] Clearpath Libra
https://www.unisys.com/client-education/clearpath-forward-libra-servers/



Date Sujet#  Auteur
16 Apr 24 * Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)237Lawrence D'Oliveiro
16 Apr 24 `* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)236David Brown
16 Apr 24  +- Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)1MitchAlsup1
26 May 24  +- Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)1MitchAlsup1
1 Oct 24  `* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)233MitchAlsup1
1 Oct 24   `* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)232Thomas Koenig
1 Oct 24    +* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)225MitchAlsup1
2 Oct 24    i+* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)223Brett
3 Oct 24    ii`* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)222Lawrence D'Oliveiro
3 Oct 24    ii +- Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)1Brett
3 Oct 24    ii +- Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)1Anton Ertl
3 Oct 24    ii `* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)219David Brown
3 Oct 24    ii  `* Byte ordering (was: Whether something is RISC or not)218Anton Ertl
3 Oct 24    ii   +- Re: Byte ordering (was: Whether something is RISC or not)1David Brown
4 Oct 24    ii   +* Re: Byte ordering (was: Whether something is RISC or not)215Lawrence D'Oliveiro
4 Oct 24    ii   i+- Re: Byte ordering1Lynn Wheeler
4 Oct 24    ii   i+* Re: Byte ordering (was: Whether something is RISC or not)211David Brown
4 Oct 24    ii   ii`* Re: Byte ordering (was: Whether something is RISC or not)210Anton Ertl
4 Oct 24    ii   ii +* Re: Byte ordering5BGB
5 Oct 24    ii   ii i`* Re: Byte ordering4MitchAlsup1
5 Oct 24    ii   ii i +* Re: Byte ordering2BGB
5 Oct 24    ii   ii i i`- Re: Byte ordering1Lawrence D'Oliveiro
5 Oct 24    ii   ii i `- Re: Byte ordering1Lawrence D'Oliveiro
5 Oct 24    ii   ii +* Re: Byte ordering (was: Whether something is RISC or not)13Lawrence D'Oliveiro
5 Oct 24    ii   ii i`* Re: Byte ordering (was: Whether something is RISC or not)12Brett
5 Oct 24    ii   ii i `* Re: Byte ordering (was: Whether something is RISC or not)11Anton Ertl
5 Oct 24    ii   ii i  `* Re: Byte ordering (was: Whether something is RISC or not)10Michael S
6 Oct 24    ii   ii i   +- Re: Byte ordering1Terje Mathisen
6 Oct 24    ii   ii i   `* Re: Byte ordering (was: Whether something is RISC or not)8Brett
7 Oct 24    ii   ii i    `* Re: Byte ordering (was: Whether something is RISC or not)7Lawrence D'Oliveiro
7 Oct 24    ii   ii i     `* Re: Byte ordering (was: Whether something is RISC or not)6Brett
7 Oct 24    ii   ii i      `* Re: Byte ordering (was: Whether something is RISC or not)5Michael S
7 Oct 24    ii   ii i       +* Re: Byte ordering2Stefan Monnier
7 Oct 24    ii   ii i       i`- Re: Byte ordering1Michael S
7 Oct 24    ii   ii i       `* Re: Byte ordering (was: Whether something is RISC or not)2Lawrence D'Oliveiro
8 Oct 24    ii   ii i        `- Re: Byte ordering1Terje Mathisen
6 Oct 24    ii   ii `* Re: Byte ordering191David Brown
6 Oct 24    ii   ii  `* Re: Byte ordering190Anton Ertl
6 Oct 24    ii   ii   `* Re: Byte ordering189John Dallman
7 Oct 24    ii   ii    +* Re: Byte ordering20Lawrence D'Oliveiro
8 Oct 24    ii   ii    i`* Re: Byte ordering19John Dallman
9 Oct 24    ii   ii    i +- VMS/NT memory management (was: Byte ordering)1Stefan Monnier
15 Oct 24    ii   ii    i +* Re: Byte ordering2Lawrence D'Oliveiro
15 Oct 24    ii   ii    i i`- Re: Byte ordering1MitchAlsup1
15 Oct 24    ii   ii    i `* Re: Byte ordering15Lawrence D'Oliveiro
15 Oct 24    ii   ii    i  +* Re: Byte ordering3Michael S
15 Oct 24    ii   ii    i  i+- Re: Byte ordering1John Dallman
18 Oct 24    ii   ii    i  i`- Re: Byte ordering1Lawrence D'Oliveiro
15 Oct 24    ii   ii    i  +* Re: Byte ordering9John Dallman
16 Oct 24    ii   ii    i  i+* Re: Byte ordering7George Neuner
16 Oct 24    ii   ii    i  ii`* Re: Byte ordering6Terje Mathisen
16 Oct 24    ii   ii    i  ii `* Re: Byte ordering5David Brown
17 Oct 24    ii   ii    i  ii  +* Re: Byte ordering2George Neuner
17 Oct 24    ii   ii    i  ii  i`- Re: Byte ordering1David Brown
17 Oct 24    ii   ii    i  ii  `* Re: clouds, not Byte ordering2John Levine
17 Oct 24    ii   ii    i  ii   `- Re: clouds, not Byte ordering1David Brown
18 Oct 24    ii   ii    i  i`- Re: Byte ordering1Lawrence D'Oliveiro
16 Oct 24    ii   ii    i  `* Re: Byte ordering2Paul A. Clayton
18 Oct 24    ii   ii    i   `- Re: Microkernels & Capabilities (was Re: Byte ordering)1Lawrence D'Oliveiro
7 Oct 24    ii   ii    `* 80286 protected mode168Anton Ertl
7 Oct 24    ii   ii     +* Re: 80286 protected mode5Lars Poulsen
7 Oct 24    ii   ii     i`* Re: 80286 protected mode4Terje Mathisen
7 Oct 24    ii   ii     i +- Re: 80286 protected mode1Michael S
7 Oct 24    ii   ii     i `* Re: 80286 protected mode2Lawrence D'Oliveiro
8 Oct 24    ii   ii     i  `- Re: 80286 protected mode1Terje Mathisen
7 Oct 24    ii   ii     +* Re: 80286 protected mode3Brett
7 Oct 24    ii   ii     i`* Re: 80286 protected mode2Michael S
7 Oct 24    ii   ii     i `- Re: 80286 protected mode1Brett
7 Oct 24    ii   ii     +- Re: 80286 protected mode1Lawrence D'Oliveiro
8 Oct 24    ii   ii     +* Re: 80286 protected mode152MitchAlsup1
8 Oct 24    ii   ii     i+* Re: 80286 protected mode4Lawrence D'Oliveiro
8 Oct 24    ii   ii     ii`* Re: 80286 protected mode3MitchAlsup1
9 Oct 24    ii   ii     ii +- Re: 80286 protected mode1David Brown
15 Oct 24    ii   ii     ii `- Re: 80286 protected mode1Lawrence D'Oliveiro
8 Oct 24    ii   ii     i`* Re: 80286 protected mode147Anton Ertl
8 Oct 24    ii   ii     i +- Re: 80286 protected mode1Robert Finch
9 Oct 24    ii   ii     i `* Re: 80286 protected mode145David Brown
9 Oct 24    ii   ii     i  +* Re: 80286 protected mode79MitchAlsup1
9 Oct 24    ii   ii     i  i`* Re: 80286 protected mode78David Brown
9 Oct 24    ii   ii     i  i `* Re: 80286 protected mode77Stephen Fuld
10 Oct 24    ii   ii     i  i  +* Re: 80286 protected mode2MitchAlsup1
10 Oct 24    ii   ii     i  i  i`- Re: 80286 protected mode1David Brown
10 Oct 24    ii   ii     i  i  +- Re: 80286 protected mode1David Brown
11 Oct 24    ii   ii     i  i  `* Re: 80286 protected mode73Tim Rentsch
15 Oct 24    ii   ii     i  i   `* Re: 80286 protected mode72Stefan Monnier
15 Oct 24    ii   ii     i  i    +* Re: 80286 protected mode30MitchAlsup1
16 Oct 24    ii   ii     i  i    i+* Re: 80286 protected mode25MitchAlsup1
16 Oct 24    ii   ii     i  i    ii+* Re: C and turtles, 80286 protected mode13John Levine
16 Oct 24    ii   ii     i  i    iii+* Re: C and turtles, 80286 protected mode7MitchAlsup1
16 Oct 24    ii   ii     i  i    iiii`* Re: C and turtles, 80286 protected mode6John Levine
17 Oct 24    ii   ii     i  i    iiii `* Re: C and turtles, 80286 protected mode5Thomas Koenig
20 Oct 24    ii   ii     i  i    iiii  `* Re: C and turtles, 80286 protected mode4Lawrence D'Oliveiro
20 Oct 24    ii   ii     i  i    iiii   `* Re: C and turtles, 80286 protected mode3George Neuner
22 Oct 24    ii   ii     i  i    iiii    `* Re: C and turtles, 80286 protected mode2Tim Rentsch
22 Oct 24    ii   ii     i  i    iiii     `- Re: C and turtles, 80286 protected mode1George Neuner
16 Oct 24    ii   ii     i  i    iii+- Re: C and turtles, 80286 protected mode1David Brown
16 Oct 24    ii   ii     i  i    iii`* Re: C and turtles, 80286 protected mode4Paul A. Clayton
17 Oct 24    ii   ii     i  i    iii +- Re: C and turtles, 80286 protected mode1David Brown
20 Oct 24    ii   ii     i  i    iii `* Re: C and turtles, 80286 protected mode2Lawrence D'Oliveiro
20 Oct 24    ii   ii     i  i    iii  `- Re: C and turtles, 80286 protected mode1Paul A. Clayton
16 Oct 24    ii   ii     i  i    ii+* Re: 80286 protected mode7Thomas Koenig
17 Oct 24    ii   ii     i  i    ii+* Re: 80286 protected mode3George Neuner
17 Oct 24    ii   ii     i  i    ii`- Re: 80286 protected mode1Tim Rentsch
16 Oct 24    ii   ii     i  i    i+* Re: 80286 protected mode3David Brown
17 Oct 24    ii   ii     i  i    i`- Re: 80286 protected mode1Tim Rentsch
16 Oct 24    ii   ii     i  i    `* Re: 80286 protected mode41David Brown
9 Oct 24    ii   ii     i  +* Re: 80286 protected mode51Thomas Koenig
13 Oct 24    ii   ii     i  `* Re: 80286 protected mode14Anton Ertl
8 Oct 24    ii   ii     `* Re: 80286 protected mode6John Levine
6 Oct 24    ii   i`* Re: Byte ordering (was: Whether something is RISC or not)2Michael S
4 Oct 24    ii   `- Re: Byte ordering (was: Whether something is RISC or not)1John Dallman
2 Oct 24    i`- Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)1Thomas Koenig
2 Oct 24    +* Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)5David Schultz
3 Oct 24    `- Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress)1Lawrence D'Oliveiro

Haut de la page

Les messages affichés proviennent d'usenet.

NewsPortal