Re: x86S Specification

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Sujet : Re: x86S Specification
De : mitchalsup (at) *nospam* aol.com (MitchAlsup1)
Groupes : comp.arch
Date : 22. Oct 2024, 22:13:41
Autres entêtes
Organisation : Rocksolid Light
Message-ID : <5d79e4ceda7bf46346a80da098645adc@www.novabbs.org>
References : 1 2 3 4 5 6
User-Agent : Rocksolid Light
On Tue, 22 Oct 2024 18:43:40 +0000, BGB wrote:

On 10/22/2024 10:26 AM, Anton Ertl wrote:
>
Several things in this paragraph makes no sense.
>
In particular, x86S is a proposal for a reduced version of the stuff
that current Intel and AMD CPUs support: There is full 64-bit support,
and 32-bit user-level support.  x86S eliminates a part of the
compatibility path from systems of yesteryear, but not that many
people use these parts nowadays anyway.  It's unclear to me what
benefits these changes are supposed to buy (unlike the elimination of
A32/T32 from some ARM chips, which obviously eliminates the whole
A32/T32 decoding path).  It seems to me that most of the complexity of
current CPUs would still be there.
>
And I certainly prefer a CPU that has more capabilities to one that
has less capabilities.  Sometimes I want to run old binaries.
>
So what would be my incentive as a user to buy an x86S CPU?  Will they
sell them for less?  I doubt it.
>
>
Yeah, basically my thoughts as well.
   Business as usual...
>
Main effect it achieves is breaking legacy boot, doesn't seem like it
would either save all that much nor "solve" x86's longstanding issues.
Intel needs a better way to exit reset--and that means the MMU/TLBs
are already up and working at the time reset is exited. This cannot
be made backwards compatible.
-------------------------------
>
*1: Probably, say (if I were designing the encoding):
   {Rb+Disp10s]        //32-bit encoding
   {Rb+Ri*FixSc]       //32-bit encoding
   {Rb+Ri*Sc]          //64-bit encoding
   [Rb+Disp33s]        //64-bit encoding
   [Rb+Ri*Sc+Disp11s]  //64-bit encoding
   [Rb+Ri*Sc+Disp33s]  //96-bit encoding
     [Rb+DISP16]         // 32-bit   16 > 10
     [Rb+Ri<<sc]         // 32-bit
     [Rb+Ri<<sc+DISP32]  // 64-bit   32 > 11
     [Rb+Ri<<sc+DISP64]  // 96-bit   64 > 33

Date Sujet#  Auteur
22 Oct 24 * Re: x86S Specification30BGB
22 Oct 24 +* Re: x86S Specification27MitchAlsup1
22 Oct 24 i+* Re: x86S Specification12John Levine
22 Oct 24 ii+* Re: x86S Specification3BGB
22 Oct 24 iii+- Re: x86S Specification1John Dallman
23 Oct 24 iii`- Re: x86S Specification1Lawrence D'Oliveiro
22 Oct 24 ii`* Re: x86S Specification8Anton Ertl
22 Oct 24 ii +* Re: x86S Specification2John Dallman
23 Oct 24 ii i`- Re: x86S Specification1Lawrence D'Oliveiro
22 Oct 24 ii +* Re: x86S Specification3BGB
22 Oct 24 ii i`* Re: x86S Specification2MitchAlsup1
25 Oct 24 ii i `- Re: x86S Specification1BGB
22 Oct 24 ii `* Re: x86S Specification2BGB
23 Oct 24 ii  `- Re: x86S Specification1Lawrence D'Oliveiro
22 Oct 24 i+- Re: x86S Specification1BGB
22 Oct 24 i`* Re: x86S Specification13George Neuner
23 Oct 24 i `* Re: x86S Specification12MitchAlsup1
24 Oct 24 i  `* Re: x86S Specification11George Neuner
25 Oct 24 i   `* Re: old phones, x86S Specification10John Levine
25 Oct 24 i    +* Re: old phones, x86S Specification2MitchAlsup1
25 Oct 24 i    i`- Re: old phones, x86S Specification1BGB
25 Oct 24 i    +* Re: old phones, x86S Specification4Lawrence D'Oliveiro
25 Oct 24 i    i`* Re: old phones, x86S Specification3John Levine
25 Oct 24 i    i +- Re: old phones, x86S Specification1John Levine
26 Oct 24 i    i `- Re: old phones, x86S Specification1Michael S
25 Oct 24 i    +- Re: old phones, x86S Specification1George Neuner
25 Oct 24 i    `* Re: old phones, x86S Specification2yeti
25 Oct 24 i     `- Re: old phones, x86S Specification1Robert Finch
22 Oct 24 `* Re: x86S Specification2MitchAlsup1
22 Oct 24  `- Re: x86S Specification1BGB

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