Re: What is an N-bit machine?

On 11/29/2024 6:37 PM, John Levine wrote:

According to Michael S  <already5chosen@yahoo.com>:

S/360 normally referred as 24-bit address architecture.
S/370 normally referred as 31-bit address architecture.
I don't know technical reasons for it, but would think that they exist.

 S/360 had 24 bit addresses and 32 bit registers. When doing address arithmetic
the high 8 bits of the register were ignored. That turned out to be a really bad
decision since a few instructions and a lot of programming conventions stored
other stuff in that high byte, causing severe pain a few years later when
memories got bigger than 16 meg. The kludge in S/370 was to use the high bit as
a flag, 0 meant 24 bit addressing, 1 meant 31 bit addressing. That worked
reasonably well although they came up with yet more kludges to let programs
switch among multiple 31-bit address spaces.

Was ESA one of those kludges?

They finally bit the bullet in 2000
when they announced zSeries with 64 bit addresses and registers.
 These days I'd say the relevant N is the size of arithmetic registers but a
lot of marketers appear to disagree with me.

I tend to agree with you, with the caveat, as Mitch pointed out, of SIMD registers.  But I suspect the term N-bit machine, will soon be a historic relic, as most architectures have converged on 64 bit arithmetic registers, and with the growth of address spaces seeming to slow down, it will be a long time before anyone goes to 128 bit (non-SIMD) registers.
--
  - Stephen Fuld
(e-mail address disguised to prevent spam)