What is an N-bit machine?

John Levine <johnl@taugh.com> writes:

I meant the main registers, for some straightforward version of main.
You are of course correct that there are special purpose registers
that are much wider but I don't think it's all that hard to see which
ones I meant.

I guess you mean the general-purpose registers, which is not a proper
definition, either, and it means that the criterion only applies to
architectures with general-purpose registers.

I tried to be more precise and as a criterion "address register size",
i.e., the size of a register that holds an address.  And I guess that
should be refined to the size of a register that holds one address (to
avoid the issue of vector registers containing addresses for
scatter/gather instructions).  This also makes it clear that this
criterion does not apply to machines like the IBM 704 and PDP-10 that
have two addresses per machine word, but for word-addressed machines
the word size makes it clear what is meant with "N-bit machine".  This
resulta in:

1) For word-addressed machines: the size of the word.

2) For byte-addressed machines: the size of a register that contains
one address.

These criteria agree with the usual understanding of the bitness of an
architecture for most architectures, with a few exceptions:

* The 68000 would be classified as 32-bit architecture, which agrees
  with the modern understanding, but not with the marketing as 16-bit
  CPU or 16/32-bit CPU at the time.

* Most CPUs described as 8-bit CPUs keep at least the program counter
  in a larger register, a number of them (6800, 8008 and its
  descendents) also have 16-bit data-address registers or
  register-pairs (at least HL for the 8008).  At the time they and the
  68000 were described as 8-bit (16-bit for the 68000) based on the
  implementation of having an 8-bit data bus, but that argument broke
  down with the 8088 and 68008.

* I am not that familiar with the old character-oriented
  architectures, such as the IBM 702; they apparently are not
  described as N-bit machines for any N, so we probably don't need to
  assign such a label to them nowadays.

* There were also fixed-word-length machines that were not binary,
  such as the IBM 7070.  Memory is described as consisting of words,
  so criterion 1 can be applied, except that it's not N-bit, but
  N-digit.

Anything else?

BTW, note that these are architectural (i.e., instruction-set-related)
criteria; an implementation can implement several instruction sets.
E.g., I can run programs for the 16-bit 8086 architecture, for the
32-bit IA-32 architecture and for the 64-bit AMD64 architecture on,
e.g., the recent AMD Ryzen 9 9950X and the Intel Core Ultra 9 285K.

Everyone agreed that all the models of S/360 were 32 bit machines, but the
implementations ranged from 8 bits for the /25 and /30 to 64 bits for
the /75.

This sentence is contradictory.  All these implementations have 32-bit
general-purpose registers (otherwise they would not be S/360
implementations), which are address registers, and are therefore
32-bit architectures by your and my criteria.

You obviously mean something different about these implementations.
What is it?

- anton
--
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>