Sujet : Re: Keeping other stuff with addresses (was: What is an N-bit machine?)
De : anton (at) *nospam* mips.complang.tuwien.ac.at (Anton Ertl)
Groupes : comp.archDate : 01. Dec 2024, 10:28:26
Autres entêtes
Organisation : Institut fuer Computersprachen, Technische Universitaet Wien
Message-ID : <2024Dec1.102826@mips.complang.tuwien.ac.at>
References : 1 2 3 4 5 6 7 8 9 10
User-Agent : xrn 10.11
Michael S <
already5chosen@yahoo.com> writes:
On Sat, 30 Nov 2024 18:08:58 GMT
anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote:
The widest arithmetic registers on AMD64 with AVX-512 are the ZMM
registers with 512 bits each. Sure, they are used for arithmetic on a
sequence of individually narrower data, but the registers have 512
bits nonetheless.
...
8x64 is not the same as 512.
Alternative facts? Anyway, the ZMM registers are used for arithmentic
and are 512 bits wide; this just shows that "size of arithmetic
registers" does not reflect what we usually mean with "N-bit", and
John Levine has refined his criterion accordingly.
You don't call 2-way superscalar 64-bit CPU 128-bit.
The "size of arithmetic registers" criterion would call the 21064 a
64-bit CPU. It's not my criterion, but it happens to agree with my
criterion for this CPU.
- anton
-- 'Anyone trying for "industrial quality" ISA should avoid undefined behavior.' Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>