Sujet : Re: Memory ordering
De : anton (at) *nospam* mips.complang.tuwien.ac.at (Anton Ertl)
Groupes : comp.archDate : 03. Dec 2024, 11:03:29
Autres entêtes
Organisation : Institut fuer Computersprachen, Technische Universitaet Wien
Message-ID : <2024Dec3.110329@mips.complang.tuwien.ac.at>
References : 1 2 3 4 5 6 7 8 9 10 11 12 13
User-Agent : xrn 10.11
Michael S <
already5chosen@yahoo.com> writes:
BTW, does your stance means that your are strongly against A64FX ?
No. According to <
https://lwn.net/Articles/970907/> A64FX is one of
the few ARM A64 implementations that provides TSO.
Lockless programming is horrendously complicated and error prone.
Sequential consistency removes only small part of potential
complications.
It's only a part, true, but I am not sure that the part is small.
Interestingly, the FP analogy persists here: having FP hardware does
not mean that numerical programming is easy, just that it is not as
hard as with fixed point.
- anton
-- 'Anyone trying for "industrial quality" ISA should avoid undefined behavior.' Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>