Re: What do we call non-pipelined designs?

On Mon, 9 Dec 2024 3:43:14 +0000, Lawrence D'Oliveiro wrote:

On Sun, 8 Dec 2024 23:05:40 +0000, MitchAlsup1 wrote:
>

Why, in this day and age, would anyone want to even consider doing
something less pipelined than that ?!?!?

>
Here’s one reason (tell me if I’m wrong): I remember some CPU designs
used CMOS and probably some other hardware magic I don’t understand to
create > chips that could run at any speed down to 0Hz.

This is just standard static CMOS design. It is they dynamic stuff
which is faster but cannot be slowed down to 0 Hz.

That is, you could slow down the clock and even stop it completely at
any point in instruction execution (keep the power on) to pause the
program, then start it up again and the program would resume from that
point.
>
Would that work with a pipeline? Actually I suppose it would.

A purely static pipeline, yes. But the trick is the ability to steal
0-k clocks from a single pipeline, without messing with the phase
accuracy of the rest of the chip.