Sujet : Re: Segments
De : already5chosen (at) *nospam* yahoo.com (Michael S)
Groupes : comp.archDate : 23. Jan 2025, 10:52:32
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <20250123115232.0000242e@yahoo.com>
References : 1 2 3 4 5 6 7 8 9 10 11 12 13 14
User-Agent : Claws Mail 3.19.1 (GTK+ 2.24.33; x86_64-w64-mingw32)
On Thu, 23 Jan 2025 01:00:49 GMT
scott@slp53.sl.home (Scott Lurndal) wrote:
Michael S <already5chosen@yahoo.com> writes:
On Wed, 22 Jan 2025 22:44:45 GMT
scott@slp53.sl.home (Scott Lurndal) wrote:
mitchalsup@aol.com (MitchAlsup1) writes:
On Wed, 22 Jan 2025 20:00:30 +0000, Scott Lurndal wrote:
mitchalsup@aol.com (MitchAlsup1) writes:
On Wed, 22 Jan 2025 14:58:04 +0000, Scott Lurndal wrote:
(MitchAlsup1)
On a Linux machine, you can find the last envp[*] entry and
subtract SP from it.
>
I would discourage programmers from relying on that for any
reason whatsoever. The aux vectors are pushed before the
envp entries.
>
This brings into question what is "on" the stack ?? to be
included in the measurement of stack size.
>
Only user data ??
Data that is present when control arrives ??
Could <equivalent> CRT0 store SP at arrival ??
>
I think we have an illdefined measurement !!
>
Everything between the base address of the stack
and the limit address of the stack. The kernel exec(2)
family system calls will allocate the initial
stack region (with guard pages to handle extension)
and populate it with the AUX, ENVP and ARG vectors
before invoking the CRT in usermode.
>
So, how does one find the base (highest address on the stack) ??
in a way that works on every system capable of running C-code ??
It's not something that a programmer generally would need, or want
to do.
However, if the OS they're using has a guard page to prevent
stack underflow, one could write a subroutine which accesses
page-aligned addresses towards the beginning of the stack
region (anti the direction of growth) until a
SIGSEGV is delivered.
>
Not every system capable of running C supports signals. I would
think that those that support signals are not even majority.
Linux and MAC can't touch windows in terms of volume - but I'd
argue that in the universe of programmers, they're close to
if not equal to windows. The vast vast majority of windows
users don't have a compiler. Those that do are working at
a higher level where the knowlege of the stack base address
would not be a useful value to know.
I did not have "big" computers in mind. In fact, if we only look at
"big" things then Android dwarfs anything else. And while Android is not
POSIX complaint, it is probably similar enough for your method to work.
I had in mind smaller things.
All but one of very many embedded environments that I touched in
last 3 decades had no signals. The exceptional one was running
Linux.
Unix (bsd/sysv) and linux support the ucontex argument
on the signal handler which provides processor state so
the signal handler can recover from the fault in whatever
fashion makes sense then transfer control to a known
starting point (either siglongjmp or by manipulating the
return context provided to the signal handler). This is
clearly going to be processor and implementation specific.
Yes, Windows is an abberation. I offered a solution, not
"the" solution. I haven't seen any valid reason for a program[*]
to need to know the base address of the process stack; if there
were a need, the implementation would provide. I believe windows
does have a functional equivalent to SIGSEGV, no? A quick search
shows "EXCEPTION_ACCESS_VIOLATION" for windows.
>
But then one would have to use SEH which is not the same as signals.
Although a specific case of SIGSEGV is the one where the SEH and
signals happen to be rather similar.
I can try it one day, but not today.
[*] Leaving aside the rare system utility or diagnostic
utility or library (e.g. valgrind, et alia may find
that a useful datum).
Date | Sujet | # | | Auteur |
1 Oct 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 387 | | MitchAlsup1 |
1 Oct 24 |  Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 386 | | Thomas Koenig |
1 Oct 24 |   Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 379 | | MitchAlsup1 |
2 Oct 24 |    Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 377 | | Brett |
3 Oct 24 |     Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 376 | | Lawrence D'Oliveiro |
3 Oct 24 |      Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | Brett |
3 Oct 24 |      Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | Anton Ertl |
3 Oct 24 |      Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 373 | | David Brown |
3 Oct 24 |       Byte ordering (was: Whether something is RISC or not) | 372 | | Anton Ertl |
3 Oct 24 |        Re: Byte ordering (was: Whether something is RISC or not) | 1 | | David Brown |
3 Oct 24 |        Re: Byte ordering (was: Whether something is RISC or not) | 369 | | Lawrence D'Oliveiro |
4 Oct 24 |         Re: Byte ordering | 1 | | Lynn Wheeler |
4 Oct 24 |         Re: Byte ordering (was: Whether something is RISC or not) | 365 | | David Brown |
4 Oct 24 |          Re: Byte ordering (was: Whether something is RISC or not) | 364 | | Anton Ertl |
4 Oct 24 |           Re: Byte ordering | 5 | | BGB |
5 Oct 24 |            Re: Byte ordering | 4 | | MitchAlsup1 |
5 Oct 24 |             Re: Byte ordering | 2 | | BGB |
5 Oct 24 |              Re: Byte ordering | 1 | | Lawrence D'Oliveiro |
5 Oct 24 |             Re: Byte ordering | 1 | | Lawrence D'Oliveiro |
5 Oct 24 |           Re: Byte ordering (was: Whether something is RISC or not) | 13 | | Lawrence D'Oliveiro |
5 Oct 24 |            Re: Byte ordering (was: Whether something is RISC or not) | 12 | | Brett |
5 Oct 24 |             Re: Byte ordering (was: Whether something is RISC or not) | 11 | | Anton Ertl |
5 Oct 24 |              Re: Byte ordering (was: Whether something is RISC or not) | 10 | | Michael S |
6 Oct 24 |               Re: Byte ordering | 1 | | Terje Mathisen |
6 Oct 24 |               Re: Byte ordering (was: Whether something is RISC or not) | 8 | | Brett |
7 Oct 24 |                Re: Byte ordering (was: Whether something is RISC or not) | 7 | | Lawrence D'Oliveiro |
7 Oct 24 |                 Re: Byte ordering (was: Whether something is RISC or not) | 6 | | Brett |
7 Oct 24 |                  Re: Byte ordering (was: Whether something is RISC or not) | 5 | | Michael S |
7 Oct 24 |                   Re: Byte ordering | 2 | | Stefan Monnier |
7 Oct 24 |                    Re: Byte ordering | 1 | | Michael S |
7 Oct 24 |                   Re: Byte ordering (was: Whether something is RISC or not) | 2 | | Lawrence D'Oliveiro |
8 Oct 24 |                    Re: Byte ordering | 1 | | Terje Mathisen |
6 Oct 24 |           Re: Byte ordering | 345 | | David Brown |
6 Oct 24 |            Re: Byte ordering | 344 | | Anton Ertl |
6 Oct 24 |             Re: Byte ordering | 189 | | John Dallman |
7 Oct 24 |              Re: Byte ordering | 20 | | Lawrence D'Oliveiro |
8 Oct 24 |               Re: Byte ordering | 19 | | John Dallman |
9 Oct 24 |                VMS/NT memory management (was: Byte ordering) | 1 | | Stefan Monnier |
15 Oct 24 |                Re: Byte ordering | 2 | | Lawrence D'Oliveiro |
15 Oct 24 |                 Re: Byte ordering | 1 | | MitchAlsup1 |
15 Oct 24 |                Re: Byte ordering | 15 | | Lawrence D'Oliveiro |
15 Oct 24 |                 Re: Byte ordering | 3 | | Michael S |
15 Oct 24 |                  Re: Byte ordering | 1 | | John Dallman |
18 Oct 24 |                  Re: Byte ordering | 1 | | Lawrence D'Oliveiro |
15 Oct 24 |                 Re: Byte ordering | 9 | | John Dallman |
16 Oct 24 |                  Re: Byte ordering | 7 | | George Neuner |
16 Oct 24 |                   Re: Byte ordering | 6 | | Terje Mathisen |
16 Oct 24 |                    Re: Byte ordering | 5 | | David Brown |
17 Oct 24 |                     Re: Byte ordering | 2 | | George Neuner |
17 Oct 24 |                      Re: Byte ordering | 1 | | David Brown |
17 Oct 24 |                     Re: clouds, not Byte ordering | 2 | | John Levine |
17 Oct 24 |                      Re: clouds, not Byte ordering | 1 | | David Brown |
18 Oct 24 |                  Re: Byte ordering | 1 | | Lawrence D'Oliveiro |
16 Oct 24 |                 Re: Byte ordering | 2 | | Paul A. Clayton |
18 Oct 24 |                  Re: Microkernels & Capabilities (was Re: Byte ordering) | 1 | | Lawrence D'Oliveiro |
7 Oct 24 |              80286 protected mode | 168 | | Anton Ertl |
7 Oct 24 |               Re: 80286 protected mode | 5 | | Lars Poulsen |
7 Oct 24 |                Re: 80286 protected mode | 4 | | Terje Mathisen |
7 Oct 24 |                 Re: 80286 protected mode | 1 | | Michael S |
7 Oct 24 |                 Re: 80286 protected mode | 2 | | Lawrence D'Oliveiro |
8 Oct 24 |                  Re: 80286 protected mode | 1 | | Terje Mathisen |
7 Oct 24 |               Re: 80286 protected mode | 3 | | Brett |
7 Oct 24 |                Re: 80286 protected mode | 2 | | Michael S |
7 Oct 24 |                 Re: 80286 protected mode | 1 | | Brett |
7 Oct 24 |               Re: 80286 protected mode | 1 | | Lawrence D'Oliveiro |
8 Oct 24 |               Re: 80286 protected mode | 152 | | MitchAlsup1 |
8 Oct 24 |                Re: 80286 protected mode | 4 | | Lawrence D'Oliveiro |
8 Oct 24 |                 Re: 80286 protected mode | 3 | | MitchAlsup1 |
9 Oct 24 |                  Re: 80286 protected mode | 1 | | David Brown |
15 Oct 24 |                  Re: 80286 protected mode | 1 | | Lawrence D'Oliveiro |
8 Oct 24 |                Re: 80286 protected mode | 147 | | Anton Ertl |
8 Oct 24 |                 Re: 80286 protected mode | 1 | | Robert Finch |
9 Oct 24 |                 Re: 80286 protected mode | 145 | | David Brown |
9 Oct 24 |                  Re: 80286 protected mode | 79 | | MitchAlsup1 |
9 Oct 24 |                   Re: 80286 protected mode | 78 | | David Brown |
9 Oct 24 |                    Re: 80286 protected mode | 77 | | Stephen Fuld |
10 Oct 24 |                     Re: 80286 protected mode | 2 | | MitchAlsup1 |
10 Oct 24 |                      Re: 80286 protected mode | 1 | | David Brown |
10 Oct 24 |                     Re: 80286 protected mode | 1 | | David Brown |
11 Oct 24 |                     Re: 80286 protected mode | 73 | | Tim Rentsch |
15 Oct 24 |                      Re: 80286 protected mode | 72 | | Stefan Monnier |
15 Oct 24 |                       Re: 80286 protected mode | 30 | | MitchAlsup1 |
16 Oct 24 |                        Re: 80286 protected mode | 25 | | MitchAlsup1 |
16 Oct 24 |                         Re: C and turtles, 80286 protected mode | 13 | | John Levine |
16 Oct 24 |                          Re: C and turtles, 80286 protected mode | 7 | | MitchAlsup1 |
16 Oct 24 |                           Re: C and turtles, 80286 protected mode | 6 | | John Levine |
17 Oct 24 |                            Re: C and turtles, 80286 protected mode | 5 | | Thomas Koenig |
20 Oct 24 |                             Re: C and turtles, 80286 protected mode | 4 | | Lawrence D'Oliveiro |
20 Oct 24 |                              Re: C and turtles, 80286 protected mode | 3 | | George Neuner |
22 Oct 24 |                               Re: C and turtles, 80286 protected mode | 2 | | Tim Rentsch |
22 Oct 24 |                                Re: C and turtles, 80286 protected mode | 1 | | George Neuner |
16 Oct 24 |                          Re: C and turtles, 80286 protected mode | 1 | | David Brown |
16 Oct 24 |                          Re: C and turtles, 80286 protected mode | 4 | | Paul A. Clayton |
17 Oct 24 |                           Re: C and turtles, 80286 protected mode | 1 | | David Brown |
20 Oct 24 |                           Re: C and turtles, 80286 protected mode | 2 | | Lawrence D'Oliveiro |
20 Oct 24 |                            Re: C and turtles, 80286 protected mode | 1 | | Paul A. Clayton |
16 Oct 24 |                         Re: 80286 protected mode | 7 | | Thomas Koenig |
16 Oct 24 |                          Re: 80286 protected mode | 2 | | MitchAlsup1 |
17 Oct 24 |                           Re: 80286 protected mode | 1 | | Tim Rentsch |
17 Oct 24 |                          Re: 80286 protected mode | 4 | | Tim Rentsch |
17 Oct 24 |                           Re: fine points of dynamic memory allocation, not 80286 protected mode | 3 | | John Levine |
17 Oct 24 |                         Re: 80286 protected mode | 3 | | George Neuner |
17 Oct 24 |                         Re: 80286 protected mode | 1 | | Tim Rentsch |
16 Oct 24 |                        Re: 80286 protected mode | 3 | | David Brown |
17 Oct 24 |                        Re: 80286 protected mode | 1 | | Tim Rentsch |
16 Oct 24 |                       Re: 80286 protected mode | 41 | | David Brown |
9 Oct 24 |                  Re: 80286 protected mode | 51 | | Thomas Koenig |
13 Oct 24 |                  Re: 80286 protected mode | 14 | | Anton Ertl |
8 Oct 24 |               Re: 80286 protected mode | 6 | | John Levine |
3 Jan 25 |             Re: Byte ordering | 154 | | Waldek Hebisch |
6 Oct 24 |         Re: Byte ordering (was: Whether something is RISC or not) | 2 | | Michael S |
3 Oct 24 |        Re: Byte ordering (was: Whether something is RISC or not) | 1 | | John Dallman |
2 Oct 24 |    Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | Thomas Koenig |
2 Oct 24 |   Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 5 | | David Schultz |
3 Oct 24 |   Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | Lawrence D'Oliveiro |