DRAM Chiplet for L3 cache?

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Sujet : DRAM Chiplet for L3 cache?
De : sfuld (at) *nospam* alumni.cmu.edu.invalid (Stephen Fuld)
Groupes : comp.arch
Date : 27. Jan 2025, 17:55:35
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Organisation : A noiseless patient Spider
Message-ID : <vn8dq5$11jgk$1@dont-email.me>
User-Agent : Mozilla Thunderbird
One of the advantages of using chiplets instead of a large monolithic chip is that you can use functionality made with different foundry technologies.
This brings up the question of why, at least so far, no one is using a DRAM chiplet (i.e. one made with a DRAM specialized technology), for the L3 cache.  ISTM that the advantage of being able to put a much higher capacity cache in the same physical size chiplet is substantial.
--
  - Stephen Fuld
(e-mail address disguised to prevent spam)

Date Sujet#  Auteur
27 Jan 25 * DRAM Chiplet for L3 cache?6Stephen Fuld
27 Jan 25 `* Re: DRAM Chiplet for L3 cache?5Anton Ertl
27 Jan 25  +- Re: DRAM Chiplet for L3 cache?1Stephen Fuld
27 Jan 25  `* Re: DRAM Chiplet for L3 cache?3Michael S
28 Jan 25   `* Re: DRAM Chiplet for L3 cache?2Stephen Fuld
29 Jan 25    `- Re: DRAM Chiplet for L3 cache?1MitchAlsup1

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