Sujet : Re: Stacks, was Segments
De : mitchalsup (at) *nospam* aol.com (MitchAlsup1)
Groupes : comp.archDate : 07. Feb 2025, 03:39:06
Autres entêtes
Organisation : Rocksolid Light
Message-ID : <d077ddea425004a4ba671872727d9937@www.novabbs.org>
References : 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
User-Agent : Rocksolid Light
On Thu, 6 Feb 2025 20:06:31 +0000, Stephen Fuld wrote:
On 2/6/2025 10:51 AM, EricP wrote:
MitchAlsup1 wrote:
On Thu, 6 Feb 2025 16:41:45 +0000, EricP wrote:
-------------------
Not sure how this would work with device IO and DMA.
Say a secure kernel that owns a disk drive with secrets that even the HV
is not authorized to see (so HV operators don't need Top Secret
clearance).
The Hypervisor has to pass to a hardware device DMA access to a memory
frame that it has no access to itself. How does one block the HV from
setting the IOMMU to DMA the device's secrets into its own memory?
>
Hmmm... something like: once a secure HV passes a physical frame address
to a secure kernel then it cannot take it back, it can only ask that
kernel for it back. Which means that the HV looses control of any
core or IOMMU PTE's that map that frame until it is handed back.
>
That would seem to imply that once an HV gives memory to a secure
guest kernel that it can only page that guest with its permission.
Hmmm...
>
I am a little confused here. When you talk about I0MMU addresses, are
you talking about memory addresses or disk addresses?
I/O MMU does not see the device commands containing the sector on
the disk to be accessed, Mostly, CPUs write directly to the CRs
of the device to start a command, bypassing I/O MMU as raw data.
In my block diagrams of HostBridge, I show I/O MMU only on the
receiving side of PCIe transport links. all the outbound traffic
has already been translated by a core MMMU, unless one allows
a device to send commands to another device.
I/O MMU sees the virtual address of where DMA is accessing, translating
accordingly.
I/O MMU sees the virtual address of MSI-X interrupts, page faults and
errors.
ISTM that
protecting memory of lower privileged programs is useless if a higher
privileged program can force a page out to disk, then can read the data
from the disk drive itself.
Protecting a process without privilege from a process WITH privilege
requires more than a little trust in the privileged process(s).
This is why there is a Secure Monitor over HyperVisor to take HV out
of the control loop for "secure stuff". By assuming the duties of
HV wrt accessing unprivileged memory of storage, SM minimizes the
footprint where trust is required.
Of course, the same is true for data
written to disk by a lesser privileged program. If the higher
privileged program can read the file, then it can compromise security.
Date | Sujet | # | | Auteur |
1 Oct 24 | Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 387 | | MitchAlsup1 |
1 Oct 24 |  Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 386 | | Thomas Koenig |
1 Oct 24 |   Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 379 | | MitchAlsup1 |
2 Oct 24 |    Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 377 | | Brett |
3 Oct 24 |     Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 376 | | Lawrence D'Oliveiro |
3 Oct 24 |      Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | Brett |
3 Oct 24 |      Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | Anton Ertl |
3 Oct 24 |      Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 373 | | David Brown |
3 Oct 24 |       Byte ordering (was: Whether something is RISC or not) | 372 | | Anton Ertl |
3 Oct 24 |        Re: Byte ordering (was: Whether something is RISC or not) | 1 | | David Brown |
3 Oct 24 |        Re: Byte ordering (was: Whether something is RISC or not) | 369 | | Lawrence D'Oliveiro |
4 Oct 24 |         Re: Byte ordering | 1 | | Lynn Wheeler |
4 Oct 24 |         Re: Byte ordering (was: Whether something is RISC or not) | 365 | | David Brown |
4 Oct 24 |          Re: Byte ordering (was: Whether something is RISC or not) | 364 | | Anton Ertl |
4 Oct 24 |           Re: Byte ordering | 5 | | BGB |
5 Oct 24 |            Re: Byte ordering | 4 | | MitchAlsup1 |
5 Oct 24 |             Re: Byte ordering | 2 | | BGB |
5 Oct 24 |              Re: Byte ordering | 1 | | Lawrence D'Oliveiro |
5 Oct 24 |             Re: Byte ordering | 1 | | Lawrence D'Oliveiro |
5 Oct 24 |           Re: Byte ordering (was: Whether something is RISC or not) | 13 | | Lawrence D'Oliveiro |
5 Oct 24 |            Re: Byte ordering (was: Whether something is RISC or not) | 12 | | Brett |
5 Oct 24 |             Re: Byte ordering (was: Whether something is RISC or not) | 11 | | Anton Ertl |
5 Oct 24 |              Re: Byte ordering (was: Whether something is RISC or not) | 10 | | Michael S |
6 Oct 24 |               Re: Byte ordering | 1 | | Terje Mathisen |
6 Oct 24 |               Re: Byte ordering (was: Whether something is RISC or not) | 8 | | Brett |
7 Oct 24 |                Re: Byte ordering (was: Whether something is RISC or not) | 7 | | Lawrence D'Oliveiro |
7 Oct 24 |                 Re: Byte ordering (was: Whether something is RISC or not) | 6 | | Brett |
7 Oct 24 |                  Re: Byte ordering (was: Whether something is RISC or not) | 5 | | Michael S |
7 Oct 24 |                   Re: Byte ordering | 2 | | Stefan Monnier |
7 Oct 24 |                    Re: Byte ordering | 1 | | Michael S |
7 Oct 24 |                   Re: Byte ordering (was: Whether something is RISC or not) | 2 | | Lawrence D'Oliveiro |
8 Oct 24 |                    Re: Byte ordering | 1 | | Terje Mathisen |
6 Oct 24 |           Re: Byte ordering | 345 | | David Brown |
6 Oct 24 |            Re: Byte ordering | 344 | | Anton Ertl |
6 Oct 24 |             Re: Byte ordering | 189 | | John Dallman |
7 Oct 24 |              Re: Byte ordering | 20 | | Lawrence D'Oliveiro |
8 Oct 24 |               Re: Byte ordering | 19 | | John Dallman |
9 Oct 24 |                VMS/NT memory management (was: Byte ordering) | 1 | | Stefan Monnier |
15 Oct 24 |                Re: Byte ordering | 2 | | Lawrence D'Oliveiro |
15 Oct 24 |                 Re: Byte ordering | 1 | | MitchAlsup1 |
15 Oct 24 |                Re: Byte ordering | 15 | | Lawrence D'Oliveiro |
15 Oct 24 |                 Re: Byte ordering | 3 | | Michael S |
15 Oct 24 |                  Re: Byte ordering | 1 | | John Dallman |
18 Oct 24 |                  Re: Byte ordering | 1 | | Lawrence D'Oliveiro |
15 Oct 24 |                 Re: Byte ordering | 9 | | John Dallman |
16 Oct 24 |                  Re: Byte ordering | 7 | | George Neuner |
16 Oct 24 |                   Re: Byte ordering | 6 | | Terje Mathisen |
16 Oct 24 |                    Re: Byte ordering | 5 | | David Brown |
17 Oct 24 |                     Re: Byte ordering | 2 | | George Neuner |
17 Oct 24 |                      Re: Byte ordering | 1 | | David Brown |
17 Oct 24 |                     Re: clouds, not Byte ordering | 2 | | John Levine |
17 Oct 24 |                      Re: clouds, not Byte ordering | 1 | | David Brown |
18 Oct 24 |                  Re: Byte ordering | 1 | | Lawrence D'Oliveiro |
16 Oct 24 |                 Re: Byte ordering | 2 | | Paul A. Clayton |
18 Oct 24 |                  Re: Microkernels & Capabilities (was Re: Byte ordering) | 1 | | Lawrence D'Oliveiro |
7 Oct 24 |              80286 protected mode | 168 | | Anton Ertl |
7 Oct 24 |               Re: 80286 protected mode | 5 | | Lars Poulsen |
7 Oct 24 |                Re: 80286 protected mode | 4 | | Terje Mathisen |
7 Oct 24 |                 Re: 80286 protected mode | 1 | | Michael S |
7 Oct 24 |                 Re: 80286 protected mode | 2 | | Lawrence D'Oliveiro |
8 Oct 24 |                  Re: 80286 protected mode | 1 | | Terje Mathisen |
7 Oct 24 |               Re: 80286 protected mode | 3 | | Brett |
7 Oct 24 |                Re: 80286 protected mode | 2 | | Michael S |
7 Oct 24 |                 Re: 80286 protected mode | 1 | | Brett |
7 Oct 24 |               Re: 80286 protected mode | 1 | | Lawrence D'Oliveiro |
8 Oct 24 |               Re: 80286 protected mode | 152 | | MitchAlsup1 |
8 Oct 24 |                Re: 80286 protected mode | 4 | | Lawrence D'Oliveiro |
8 Oct 24 |                 Re: 80286 protected mode | 3 | | MitchAlsup1 |
9 Oct 24 |                  Re: 80286 protected mode | 1 | | David Brown |
15 Oct 24 |                  Re: 80286 protected mode | 1 | | Lawrence D'Oliveiro |
8 Oct 24 |                Re: 80286 protected mode | 147 | | Anton Ertl |
8 Oct 24 |                 Re: 80286 protected mode | 1 | | Robert Finch |
9 Oct 24 |                 Re: 80286 protected mode | 145 | | David Brown |
9 Oct 24 |                  Re: 80286 protected mode | 79 | | MitchAlsup1 |
9 Oct 24 |                   Re: 80286 protected mode | 78 | | David Brown |
9 Oct 24 |                    Re: 80286 protected mode | 77 | | Stephen Fuld |
10 Oct 24 |                     Re: 80286 protected mode | 2 | | MitchAlsup1 |
10 Oct 24 |                      Re: 80286 protected mode | 1 | | David Brown |
10 Oct 24 |                     Re: 80286 protected mode | 1 | | David Brown |
11 Oct 24 |                     Re: 80286 protected mode | 73 | | Tim Rentsch |
15 Oct 24 |                      Re: 80286 protected mode | 72 | | Stefan Monnier |
15 Oct 24 |                       Re: 80286 protected mode | 30 | | MitchAlsup1 |
16 Oct 24 |                        Re: 80286 protected mode | 25 | | MitchAlsup1 |
16 Oct 24 |                         Re: C and turtles, 80286 protected mode | 13 | | John Levine |
16 Oct 24 |                          Re: C and turtles, 80286 protected mode | 7 | | MitchAlsup1 |
16 Oct 24 |                           Re: C and turtles, 80286 protected mode | 6 | | John Levine |
17 Oct 24 |                            Re: C and turtles, 80286 protected mode | 5 | | Thomas Koenig |
20 Oct 24 |                             Re: C and turtles, 80286 protected mode | 4 | | Lawrence D'Oliveiro |
20 Oct 24 |                              Re: C and turtles, 80286 protected mode | 3 | | George Neuner |
22 Oct 24 |                               Re: C and turtles, 80286 protected mode | 2 | | Tim Rentsch |
22 Oct 24 |                                Re: C and turtles, 80286 protected mode | 1 | | George Neuner |
16 Oct 24 |                          Re: C and turtles, 80286 protected mode | 1 | | David Brown |
16 Oct 24 |                          Re: C and turtles, 80286 protected mode | 4 | | Paul A. Clayton |
17 Oct 24 |                           Re: C and turtles, 80286 protected mode | 1 | | David Brown |
20 Oct 24 |                           Re: C and turtles, 80286 protected mode | 2 | | Lawrence D'Oliveiro |
20 Oct 24 |                            Re: C and turtles, 80286 protected mode | 1 | | Paul A. Clayton |
16 Oct 24 |                         Re: 80286 protected mode | 7 | | Thomas Koenig |
16 Oct 24 |                          Re: 80286 protected mode | 2 | | MitchAlsup1 |
17 Oct 24 |                           Re: 80286 protected mode | 1 | | Tim Rentsch |
17 Oct 24 |                          Re: 80286 protected mode | 4 | | Tim Rentsch |
17 Oct 24 |                           Re: fine points of dynamic memory allocation, not 80286 protected mode | 3 | | John Levine |
17 Oct 24 |                         Re: 80286 protected mode | 3 | | George Neuner |
17 Oct 24 |                         Re: 80286 protected mode | 1 | | Tim Rentsch |
16 Oct 24 |                        Re: 80286 protected mode | 3 | | David Brown |
17 Oct 24 |                        Re: 80286 protected mode | 1 | | Tim Rentsch |
16 Oct 24 |                       Re: 80286 protected mode | 41 | | David Brown |
9 Oct 24 |                  Re: 80286 protected mode | 51 | | Thomas Koenig |
13 Oct 24 |                  Re: 80286 protected mode | 14 | | Anton Ertl |
8 Oct 24 |               Re: 80286 protected mode | 6 | | John Levine |
3 Jan 25 |             Re: Byte ordering | 154 | | Waldek Hebisch |
6 Oct 24 |         Re: Byte ordering (was: Whether something is RISC or not) | 2 | | Michael S |
3 Oct 24 |        Re: Byte ordering (was: Whether something is RISC or not) | 1 | | John Dallman |
2 Oct 24 |    Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | Thomas Koenig |
2 Oct 24 |   Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 5 | | David Schultz |
3 Oct 24 |   Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) | 1 | | Lawrence D'Oliveiro |