Re: Why VAX Was the Ultimate CISC and Not RISC

On Sat, 1 Mar 2025 11:58:17 +0000, Anton Ertl wrote:

Lawrence D'Oliveiro <ldo@nz.invalid> writes:

Could the VAX have been designed as a
RISC architecture to begin with? Because not doing so meant that, just
over a decade later, RISC architectures took over the “real computer”
market and wiped the floor with DEC’s flagship architecture,
performance-wise.
>
The answer was no, the VAX could not have been done as a RISC
architecture. RISC wasn’t actually price-performance competitive until
the latter 1980s:
>
   RISC didn’t cross over CISC until 1985. This occurred with the
   availability of large SRAMs that could be used for caches.

>
Like other USA-based computer architects, Bell ignores ARM, which
outperformed the VAX without using caches and was much easier to
design.

Was ARM around when VAX was being designed (~1973) ??
"The Case for the Reduced Instruction Set Computer" was after
1980 as a point of temporal reference.

As for code size, we see significantly smaller code for RISC
instruction sets with 16/32-bit encodings such as ARM T32/A32 and
RV64GC than for all CISCs, including AMD64, i386, and S390x
<2024Jan4.101941@mips.complang.tuwien.ac.at>.  I doubt that VAX fares
so much better in this respect that its code is significantly smaller
than for these CPUs.

VAX's advantage was it executed fewer instructions (VAX only executed
65% of the number of instructions R2000 executed.)
My 66000 only needs 70% of the instructions RISC-V requires. Thus
it is within spitting distance of VAX instruction count while still
being almost a RISC architecture.

Bottom line: If you sent, e.g., me and the needed documents back in
time to the start of the VAX project, and gave me a magic wand that
would convince the DEC management and workforce

You would also have to convince the Computer Science department at
CMU; Where a lot of VAX ideas were dreamed up based on the success
of the PDP-11.

                                                that I know how to
design their next architecture, and how to compiler for it, I would
give the implementation team RV32GC as architecture to implement, and
that they should use pipelining for that, and of course also give that
to the software people.

A pipelined machine in 1978 would have had 50% to 100% more circuit
boards than VAX 11/780, making it a lot more expensive.

As a result, DEC would have had an architecture that would have given
them superior performance, they would not have suffered from the
infighting of VAX9000 vs. PRISM etc. (and not from the wrong decision
to actually build the VAX9000), and might still be going strong to
this day.  They would have been able to extend RV32GC to RV64GC
without problems, and produce superscalar and OoO implementations.

The design point you target for the original VAX would have taken
significantly longer to design, debug, and ship.

OTOH, DEC had great success with the VAX for a while, and their demise
may have been unavoidable given their market position: Their customers
(especially the business customers of VAXen) went to them instead of
IBM, because they wanted something less costly, and they continued
onwards to PCs running Linux when they provided something less costly.
So DEC would also have needed to outcompete Intel and the PC market to
succeed (and IBM eventually got out of that market).

Unclear.

- anton