Sujet : Re: Why VAX Was the Ultimate CISC and Not RISC
De : rjs (at) *nospam* fdy2.co.uk (Robert Swindells)
Groupes : comp.archDate : 05. Mar 2025, 16:01:11
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <vq9ovn$2etk9$1@dont-email.me>
References : 1 2 3 4 5 6
User-Agent : Pan/0.160 (Toresk; )
On Sun, 02 Mar 2025 18:30:24 GMT, Anton Ertl wrote:
Robert Swindells <rjs@fdy2.co.uk> writes:
On Sun, 02 Mar 2025 09:34:37 GMT, Anton Ertl wrote:
>
mitchalsup@aol.com (MitchAlsup1) writes:
A pipelined machine in 1978 would have had 50% to 100% more circuit
boards than VAX 11/780, making it a lot more expensive.
...
You could look at the MIT Lisp Machine, it used basically the same chips
as a VAX 11/780 but was a pipelined load/store architecture internally.
And what was the effect on the number of circuit boards? What effect
did the load/store architecture have, and what effect did the pipelining
have?
It's been a number of years since I read about Lisp Machines and
Symbolics. My impression was that they were both based on CISCy ideas;
it's about closing the semantic gap, no? Load/store would surprise me.
I don't know the internal architecture of Symbolics machines well enough
to comment on it, only the MIT/LMI/TI ones.
The MIT Lisp Machine was described as microcoded but this is more like a
simple RTOS combined with an interpreter for the 16-bit instructions of
the higher level emulated stack machine.
The "micro" instruction set is three address, load/store, even has
delay slots. There are a lot of registers so the instruction word is wide
at 56 bits, there is 16kw of SRAM to hold this code.
Code written in this looks like typical RISC assembler to me, I have added
TFTP support to it, there was also an option to compile Lisp down to the
real instruction set.
Built using a 74181+74182 ALU with other 74 series logic same as a VAX
11/780. The pipeline is two instructions deep.
The design documentation is available online, someone could go through
that to get the exact number of boards used. The purchase price was lower
than a VAX though, even with a high-resolution display.
And when the RISC revolution came, they could not compete. The RISCy
way to Lisp implementation was explored in SPUR (and Smalltalk in SOAR)
(one of which counts as RISC-III and the other as RISC-IV, I don't
remember which), and commercialized in SPARC's instructions with support
for tags (not used in the Lisp system that a former comp.arch regular
contributed to).
SOAR was before SPUR.
The tags support on SPARC(32) only helps in Lisp for integer operations
inline, like using a number as an array offset.
The same word layout of using the "free" lower bits for tags when you know
that objects are aligned to larger boundaries is still used in most Lisp
systems today, just without any hardware support, you need to generate
instructions to shift down an integer value before using it.