Sujet : Re: Instruction Parcel Size
De : robfi680 (at) *nospam* gmail.com (Robert Finch)
Groupes : comp.archDate : 09. Mar 2025, 13:36:59
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <vqk21e$npck$1@dont-email.me>
References : 1 2 3
User-Agent : Mozilla Thunderbird
Conditional Branches (compare and branch) are 48-bit
pp-R-TTTTTTTTTTTTTTTTTTT-aaaaaa-bbbbbb-A-ffff-ooooooo-01
Careful choice of oooooo may allow it to contain the condition
in the ffff field expanding the displacement to 25-effective
bits.
Gained a bit in the displacement field by allocating another row of opcodes and moving the 'R' bit into the opcode. So, now its
pp-TTTTTTTTTTTTTTTTTTTT-aaaaaa-bbbbbb-A-ffff-oooRooo-01
a longer form of branches could also be made using a 96-bit instruction
pp-{68{T}}-aaaaaa-bbbbbb-A-ffff-oooRooo-10
been pondering coming up with a shorter form (24-bit) branches, maybe by comparing to zero, BEQZ / BNEZ. Say,
TTTTTTTTT-aaaaaa-ooooooo-00
would be good only for word-size integer value comparisons, but that might work a significant portion of the time.
Having 20 T's gives 21.5 bits of effective displacement, as the displacement T's are multiplied by three.
Using up eight of the free opcodes, so there is only about 13 left now, but I think it was worth it to get a branch displacement bit.
Hmmm, I could get rid of the 'A' bit by moving it to a control register. One would likely want absolute addressing for branches for the entire program, not just one-at-a-time selection.