Re: MSI interrupts

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Sujet : Re: MSI interrupts
De : robfi680 (at) *nospam* gmail.com (Robert Finch)
Groupes : comp.arch
Date : 17. Mar 2025, 16:23:24
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <vr9epd$cqbc$1@dont-email.me>
References : 1 2 3 4 5 6 7 8 9 10 11 12 13 14
User-Agent : Mozilla Thunderbird
On 2025-03-17 10:11 a.m., Michael S wrote:
On Mon, 17 Mar 2025 13:38:12 GMT
scott@slp53.sl.home (Scott Lurndal) wrote:
 
Robert Finch <robfi680@gmail.com> writes:
 
   <please trim posts>
>
>
Consider that you have a pool of 4 cores setup to receive
interrupts. That those 4 cores are running at differing priorities
and the interrupt is at a still different priority. You want the
core operating at the lowest
priority (with the right software stack) to accept the interrupt
!!
>
Okay, I wrote a naive hardware filter for this which should work
okay for small numbers of CPUs but does not scale up very well.
What happens if there is no core ready? Place the IRQ back into the
queue (regenerate the IRQ as an IRQ miss IRQ)? Or just wait for an
available core. I do not like the idea of waiting as it could stall
the system.
>
Use a fifo to hold up to N pending IRQ. Define a signal that asserts
when the fifo is non-empty.  The CPU can mask the signal to prevent
interruption, when the signal is unmasked the CPU pops the
first IRQ from the FIFO.   Or use a bitmap in flops or SRAM
(prioritization happensin the logic that asserts the fact
hat an interrupt is pending to the CPU).
>
Choose whether you want a FIFO/bitmap per target CPU, or global
pending data with the logic to select highest priority pending
IRQ when the CPU signals that interrups are not masked.
 The problem Robert is talking about arises when there are many
interrupt source and many target CPUs.
The required routing/prioritization/acknowledgment logic (at least a
naive logic I am having in mind) would be either non-scalable or
relatively complicated. Process of selection for the second case will
take multiple cycles (I am thinking about ring).
 
Yeah, that was an issue.
My naive filter occupied only about 50 LUTs for eight CPU cores which is probably okay timing wise. But it jumped up to about 1500 LUTs for 63 cores. I think it is O^2 logic.
My thought was to try using something like the bit arrays for an age matrix.
Race logic is to be avoided. It cannot be processed in an FPGA.

Date Sujet#  Auteur
13 Mar 25 * MSI interrupts162Robert Finch
13 Mar 25 `* Re: MSI interrupts161MitchAlsup1
13 Mar 25  +* Re: MSI interrupts5Robert Finch
13 Mar 25  i+- Re: MSI interrupts1MitchAlsup1
13 Mar 25  i`* Re: MSI interrupts3Robert Finch
13 Mar 25  i +- Re: MSI interrupts1MitchAlsup1
13 Mar 25  i `- Re: MSI interrupts1Stefan Monnier
13 Mar 25  `* Re: MSI interrupts155MitchAlsup1
13 Mar 25   `* Re: MSI interrupts154MitchAlsup1
14 Mar 25    `* Re: MSI interrupts153MitchAlsup1
14 Mar 25     `* Re: MSI interrupts152MitchAlsup1
14 Mar 25      `* Re: MSI interrupts151MitchAlsup1
15 Mar 25       `* Re: MSI interrupts150Robert Finch
15 Mar 25        `* Re: MSI interrupts149MitchAlsup1
15 Mar 25         `* Re: MSI interrupts148Robert Finch
16 Mar 25          `* Re: MSI interrupts147Robert Finch
16 Mar 25           +- Re: MSI interrupts1MitchAlsup1
17 Mar 25           +* Re: MSI interrupts142Michael S
17 Mar 25           i+- Re: MSI interrupts1Robert Finch
17 Mar 25           i+* Re: MSI interrupts133Robert Finch
18 Mar 25           ii+* Re: MSI interrupts127Robert Finch
19 Mar 25           iii+* Re: MSI interrupts124MitchAlsup1
19 Mar 25           iiii+* Re: MSI interrupts121Dan Cross
19 Mar 25           iiiii+* Re: MSI interrupts112MitchAlsup1
20 Mar 25           iiiiii`* Re: MSI interrupts111Dan Cross
20 Mar 25           iiiiii `* Re: MSI interrupts110MitchAlsup1
20 Mar 25           iiiiii  `* Re: MSI interrupts109Dan Cross
20 Mar 25           iiiiii   +* Re: MSI interrupts31MitchAlsup1
24 Mar 25           iiiiii   i`* Re: MSI interrupts30Dan Cross
24 Mar 25           iiiiii   i +* Re: MSI interrupts20MitchAlsup1
24 Mar 25           iiiiii   i i+* Re: MSI interrupts18Stefan Monnier
24 Mar 25           iiiiii   i ii`* Re: MSI interrupts17MitchAlsup1
24 Mar 25           iiiiii   i ii `* Re: MSI interrupts16Dan Cross
24 Mar 25           iiiiii   i ii  +* Re: MSI interrupts8MitchAlsup1
25 Mar 25           iiiiii   i ii  i`* Re: MSI interrupts7Dan Cross
25 Mar 25           iiiiii   i ii  i `* Re: MSI interrupts6Dan Cross
25 Mar 25           iiiiii   i ii  i  `* Re: MSI interrupts5Stefan Monnier
25 Mar 25           iiiiii   i ii  i   +- Re: MSI interrupts1Stefan Monnier
25 Mar 25           iiiiii   i ii  i   +- Re: MSI interrupts1Dan Cross
27 Mar 25           iiiiii   i ii  i   `* Re: MSI interrupts2Terje Mathisen
27 Mar 25           iiiiii   i ii  i    `- Re: MSI interrupts1MitchAlsup1
25 Mar 25           iiiiii   i ii  `* Re: MSI interrupts7Chris M. Thomasson
25 Mar 25           iiiiii   i ii   `* Re: MSI interrupts6Dan Cross
25 Mar 25           iiiiii   i ii    `* Re: MSI interrupts5Chris M. Thomasson
25 Mar 25           iiiiii   i ii     `* Re: MSI interrupts4Dan Cross
26 Mar 25           iiiiii   i ii      `* Re: MSI interrupts3Chris M. Thomasson
26 Mar 25           iiiiii   i ii       `* Re: MSI interrupts2Dan Cross
26 Mar 25           iiiiii   i ii        `- Re: MSI interrupts1Chris M. Thomasson
24 Mar 25           iiiiii   i i`- Re: MSI interrupts1Dan Cross
24 Mar 25           iiiiii   i +- Re: MSI interrupts1MitchAlsup1
24 Mar 25           iiiiii   i `* Re: MSI interrupts8Dan Cross
24 Mar 25           iiiiii   i  `* Re: MSI interrupts7Chris M. Thomasson
24 Mar 25           iiiiii   i   `* Re: MSI interrupts6Dan Cross
25 Mar 25           iiiiii   i    `* Re: MSI interrupts5Chris M. Thomasson
25 Mar 25           iiiiii   i     +* Re: MSI interrupts2Chris M. Thomasson
25 Mar 25           iiiiii   i     i`- Re: MSI interrupts1Dan Cross
25 Mar 25           iiiiii   i     `* Re: MSI interrupts2Dan Cross
25 Mar 25           iiiiii   i      `- Re: MSI interrupts1Chris M. Thomasson
24 Mar 25           iiiiii   +- Re: MSI interrupts1Chris M. Thomasson
24 Mar 25           iiiiii   `* Re: MSI interrupts76Dan Cross
24 Mar 25           iiiiii    +* Re: MSI interrupts57MitchAlsup1
25 Mar 25           iiiiii    i`* Re: MSI interrupts56Dan Cross
25 Mar 25           iiiiii    i `* Re: MSI interrupts55MitchAlsup1
25 Mar 25           iiiiii    i  +* Re: MSI interrupts2Stefan Monnier
25 Mar 25           iiiiii    i  i`- Re: MSI interrupts1Chris M. Thomasson
25 Mar 25           iiiiii    i  +- Re: MSI interrupts1Dan Cross
25 Mar 25           iiiiii    i  `* Re: MSI interrupts51MitchAlsup1
25 Mar 25           iiiiii    i   `* Re: MSI interrupts50Dan Cross
25 Mar 25           iiiiii    i    `* Re: MSI interrupts49MitchAlsup1
25 Mar 25           iiiiii    i     `* Re: MSI interrupts48Dan Cross
25 Mar 25           iiiiii    i      `* Re: MSI interrupts47MitchAlsup1
25 Mar 25           iiiiii    i       `* Re: MSI interrupts46Dan Cross
25 Mar 25           iiiiii    i        +* Re: MSI interrupts8Stefan Monnier
26 Mar 25           iiiiii    i        i+* Re: MSI interrupts5Dan Cross
26 Mar 25           iiiiii    i        ii`* Re: MSI interrupts4Stefan Monnier
26 Mar 25           iiiiii    i        ii +- Re: MSI interrupts1Dan Cross
26 Mar 25           iiiiii    i        ii `* Re: MSI interrupts2MitchAlsup1
27 Mar 25           iiiiii    i        ii  `- Re: MSI interrupts1Stefan Monnier
26 Mar 25           iiiiii    i        i+- Re: MSI interrupts1Chris M. Thomasson
26 Mar 25           iiiiii    i        i`- Re: MSI interrupts1MitchAlsup1
26 Mar 25           iiiiii    i        `* Re: MSI interrupts37MitchAlsup1
26 Mar 25           iiiiii    i         `* Re: MSI interrupts36Dan Cross
26 Mar 25           iiiiii    i          +* Re: MSI interrupts4Stefan Monnier
26 Mar 25           iiiiii    i          i`* Re: MSI interrupts3Dan Cross
26 Mar 25           iiiiii    i          i `* Re: MSI interrupts2Chris M. Thomasson
4 Apr 25           iiiiii    i          i  `- Re: MSI interrupts1Chris M. Thomasson
26 Mar 25           iiiiii    i          `* Re: MSI interrupts31MitchAlsup1
26 Mar 25           iiiiii    i           +- Re: MSI interrupts1Stefan Monnier
26 Mar 25           iiiiii    i           +* Re: MSI interrupts2Stefan Monnier
27 Mar 25           iiiiii    i           i`- Re: MSI interrupts1MitchAlsup1
27 Mar 25           iiiiii    i           +* Re: MSI interrupts3MitchAlsup1
27 Mar 25           iiiiii    i           i`* Re: MSI interrupts2MitchAlsup1
27 Mar 25           iiiiii    i           i `- Re: MSI interrupts1Dan Cross
27 Mar 25           iiiiii    i           `* Re: MSI interrupts24Dan Cross
27 Mar 25           iiiiii    i            +* Re: MSI interrupts2Stefan Monnier
27 Mar 25           iiiiii    i            i`- Re: MSI interrupts1Dan Cross
27 Mar 25           iiiiii    i            +* Re: MSI interrupts12MitchAlsup1
28 Mar 25           iiiiii    i            i`* Re: MSI interrupts11Dan Cross
28 Mar 25           iiiiii    i            i +- Re: MSI interrupts1MitchAlsup1
28 Mar 25           iiiiii    i            i +* Re: MSI interrupts5MitchAlsup1
28 Mar 25           iiiiii    i            i i+* Re: MSI interrupts3Stefan Monnier
28 Mar 25           iiiiii    i            i i`- Re: MSI interrupts1Dan Cross
28 Mar 25           iiiiii    i            i +* Re: MSI interrupts2Stefan Monnier
28 Mar 25           iiiiii    i            i `* Re: MSI interrupts2Chris M. Thomasson
27 Mar 25           iiiiii    i            `* Re: MSI interrupts9MitchAlsup1
25 Mar 25           iiiiii    `* Re: MSI interrupts18Dan Cross
20 Mar 25           iiiii`* Re: MSI interrupts8MitchAlsup1
19 Mar 25           iiii`* Re: MSI interrupts2MitchAlsup1
19 Mar 25           iii`* Re: MSI interrupts2Robert Finch
18 Mar 25           ii`* Re: MSI interrupts5MitchAlsup1
17 Mar 25           i`* Re: MSI interrupts7MitchAlsup1
17 Mar 25           `* Re: MSI interrupts3Robert Finch

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