Is an instruction on the critical path? (was: auto predicating branches)

Liste des GroupesRevenir à c arch 
Sujet : Is an instruction on the critical path? (was: auto predicating branches)
De : anton (at) *nospam* mips.complang.tuwien.ac.at (Anton Ertl)
Groupes : comp.arch
Date : 21. Apr 2025, 14:39:25
Autres entêtes
Organisation : Institut fuer Computersprachen, Technische Universitaet Wien
Message-ID : <2025Apr21.153925@mips.complang.tuwien.ac.at>
References : 1 2 3 4 5 6 7 8 9 10 11 12 13 14
User-Agent : xrn 10.11
anton@mips.complang.tuwien.ac.at (Anton Ertl) writes:
So the hardware should take predictability of a condition and the
availability of the condition into consideration for if-conversion.

Another criterion would be whether one of the potentially
if-converted instructions is on the critical data-dependency path.  If
none of them are, additional latency (if any) from if-conversion may
be less of an issue.  OTOH, it may also mean that the code is
resource-limited rather than dependency-limited, and that one should
avoid if-conversion in order to avoid additional resource consumption
(and of course prediction accuracy also plays into these
considerations).

This made me think how one could determine whether an instruction is
on the critical path.  If an instruction X is committed, and the only
instructions later in the reorder buffer are data-flow successors of
X, then X is obviously on the critical path.  An instruction Y that
delivers the last input that releases X from the scheduler into the
functional unit is also on the critical path; this is transitive, and
several results may arrive in the same cycle.

Marking X as a critical instruction is relatively easy, although one
might also count how many times of all dynamic instances of the
instruction were critical.  Marking the critical data-flow
predecessors is harder, especially across several levels (not to
mention all levels); one way is to do it over time: when an
instruction V delivers a dependency that releases an instruction W
from the scheduler that is already marked as critical, V is marked as
critical as well.

The same instruction may be on the critical path in one execution, but
not in another execution, due to cache hits, or differences in control
flow.  The approach outlined above only works correctly if W is always
on the critical path.  V should probably only marked as critical if
the number of critical executions of W relative to the overall
executions of W is high.

Showing the critical path through performance counters might help
programmers improve the performance of their programs.

- anton
--
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>

Date Sujet#  Auteur
31 Oct 24 * Page fetching cache controller59Robert Finch
31 Oct 24 +- Re: Page fetching cache controller1MitchAlsup1
6 Nov 24 `* Re: Q+ Fibonacci57Robert Finch
17 Apr 25  `* Re: register sets56Robert Finch
17 Apr 25   +* Re: register sets53Stephen Fuld
17 Apr 25   i+- Re: register sets1Robert Finch
17 Apr 25   i+* Re: register sets46MitchAlsup1
18 Apr 25   ii`* Re: register sets45Robert Finch
18 Apr 25   ii `* Re: register sets44MitchAlsup1
20 Apr 25   ii  `* Re: register sets43Robert Finch
21 Apr 25   ii   `* Re: auto predicating branches42Robert Finch
21 Apr 25   ii    `* Re: auto predicating branches41Anton Ertl
21 Apr 25   ii     +- Is an instruction on the critical path? (was: auto predicating branches)1Anton Ertl
21 Apr 25   ii     `* Re: auto predicating branches39MitchAlsup1
22 Apr 25   ii      `* Re: auto predicating branches38Anton Ertl
22 Apr 25   ii       +- Re: auto predicating branches1MitchAlsup1
22 Apr 25   ii       `* Re: auto predicating branches36Anton Ertl
22 Apr 25   ii        `* Re: auto predicating branches35MitchAlsup1
23 Apr 25   ii         +* Re: auto predicating branches3Stefan Monnier
23 Apr 25   ii         i`* Re: auto predicating branches2Anton Ertl
25 Apr 25   ii         i `- Re: auto predicating branches1MitchAlsup1
23 Apr 25   ii         `* Re: auto predicating branches31Anton Ertl
23 Apr 25   ii          `* Re: auto predicating branches30MitchAlsup1
24 Apr 25   ii           `* Re: asynch register rename29Robert Finch
27 Apr 25   ii            `* Re: fractional PCs28Robert Finch
27 Apr 25   ii             `* Re: fractional PCs27MitchAlsup1
28 Apr 25   ii              `* Re: fractional PCs26Robert Finch
28 Apr 25   ii               +* Re: fractional PCs15MitchAlsup1
29 Apr 25   ii               i`* Re: fractional PCs14Robert Finch
5 May 25   ii               i `* Re: control co-processor13Robert Finch
5 May 25   ii               i  `* Re: control co-processor12Al Kossow
5 May 25   ii               i   `* Re: control co-processor11Stefan Monnier
6 May 25   ii               i    +* Re: control co-processor3MitchAlsup1
7 May 25   ii               i    i+- Re: control co-processor1MitchAlsup1
15 Jul 25   ii               i    i`- Re: control co-processor1MitchAlsup1
7 May 25   ii               i    `* Scan chains (was: control co-processor)7Stefan Monnier
7 May 25   ii               i     +* Re: Scan chains (was: control co-processor)2Al Kossow
7 May 25   ii               i     i`- Re: Scan chains1Stefan Monnier
7 May 25   ii               i     +* Re: Scan chains3MitchAlsup1
7 May 25   ii               i     i`* Re: Scan chains2Stefan Monnier
8 May 25   ii               i     i `- Re: Scan chains1MitchAlsup1
15 Jul 25   ii               i     `- Re: Scan chains1MitchAlsup1
29 Apr 25   ii               `* Re: fractional PCs10Robert Finch
29 Apr 25   ii                `* Re: fractional PCs9MitchAlsup1
30 Apr 25   ii                 `* Re: fractional PCs8Robert Finch
30 Apr 25   ii                  +* Re: fractional PCs6Thomas Koenig
1 May 25   ii                  i+- Re: fractional PCs1Robert Finch
2 May 25   ii                  i`* Re: fractional PCs4moi
2 May 25   ii                  i +* Re: millicode, extracode, fractional PCs2John Levine
2 May 25   ii                  i i`- Re: millicode, extracode, fractional PCs1moi
2 May 25   ii                  i `- Re: fractional PCs1moi
30 Apr 25   ii                  `- Re: fractional PCs1MitchAlsup1
15 Jul 25   i`* Re: register sets5John Savard
15 Jul 25   i `* Re: register sets4MitchAlsup1
19 Jul 25   i  `* Re: register sets3Robert Finch
19 Jul 25   i   `* Re: register sets2Anton Ertl
19 Jul 25   i    `- Re: register sets1MitchAlsup1
15 Jul 25   `* Re: register sets2John Savard
15 Jul 25    `- Re: register sets1MitchAlsup1

Haut de la page

Les messages affichés proviennent d'usenet.

NewsPortal