Re: auto predicating branches

On Thu, 24 Apr 2025 14:10:50 +0000, EricP wrote:

Anton Ertl wrote:

Stefan Monnier <monnier@iro.umontreal.ca> writes:

Of course, nothing prevents a CPU from doing "predicate prediction":
instead of waiting for an answer to `needle < *base[middle]`, it could
try and guess whether it will be true or false and thus choose to send
one of the two addresses (or both) to the memory (and later check the
prediction and rollback, just like we do with normal branches).

>
That would subvert the use of predication for getting constant-time
code for avoiding timing side channels.  I.e., not a good idea.
>
- anton

>
This assumes that the predicate's not-executed path is nullified in a
constant time way. That might be ok for simple 1-clock instructions but
I would want heavier ones, MUL, DIV, all floats, and all LD and ST,
to be at worst nullified to 1-clock each, even better to 0.
>
OoO nullified (not-executed) instructions may still take 1 clock if all
such instructions that write a register have to copy the old physical
dest register value to the new physical register.

Or to broadcast that you should NOT be waiting on this operand any
longer.

A constant time guarantee might only be possible if one manually
arranges
to unconditionally perform all calculations then CMOV the result.