Re: DMA is obsolete

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Sujet : Re: DMA is obsolete
De : lars (at) *nospam* cleo.beagle-ears.com (Lars Poulsen)
Groupes : comp.arch
Date : 26. Apr 2025, 17:28:47
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <slrn100q2dv.eisl.lars@cleo.beagle-ears.com>
References : 1
User-Agent : slrn/1.0.3 (Linux)
On 2025-04-26, John Levine <johnl@taugh.com> wrote:
Well, not entirely.  This preprint argues that in environments with
lots of cores and where latency is an issue, programmed I/O can outperform
DMA.
>
Rethinking Programmed I/O for Fast Devices, Cheap Cores, and Coherent Interconnects
>
Anastasiia Ruzhanskaia, Pengcheng Xu, David Cock, Timothy Roscoe
>
Conventional wisdom holds that an efficient interface between an OS
running on a CPU and a high-bandwidth I/O device should use Direct
Memory Access (DMA) to offload data transfer, descriptor rings for
buffering and queuing, and interrupts for asynchrony between cores and
device. In this paper we question this wisdom in the light of two
trends: modern and emerging cache-coherent interconnects like CXL3.0,
and workloads, particularly microservices and serverless computing.
Like some others before us, we argue that the assumptions of the
DMA-based model are obsolete, and in many use-cases programmed I/O,
where the CPU explicitly transfers data and control information to and
from a device via loads and stores, delivers a more efficient system.
However, we push this idea much further. We show, in a real hardware
implementation, the gains in latency for fine-grained communication
achievable using an open cache-coherence protocol which exposes cache
transitions to a smart device, and that throughput is competitive with
DMA over modern interconnects. We also demonstrate three use-cases:
fine-grained RPC-style invocation of functions on an accelerator,
offloading of operators in a streaming dataflow engine, and a network
interface targeting serverless functions, comparing our use of
coherence with both traditional DMA-style interaction and a
highly-optimized implementation using memory-mapped programmed I/O
over PCIe.
>
https://arxiv.org/abs/2409.08141

What is the difference between DMA and message-passing to another core
doing CMOV loop at the ISA level?

DMA means doing that it the micro-engine instead of at the ISA level.
Same difference.

What am I missing?


Date Sujet#  Auteur
26 Apr 25 * DMA is obsolete33John Levine
26 Apr 25 +* Re: DMA is obsolete5Lars Poulsen
26 Apr 25 i+- Re: DMA is obsolete1Terje Mathisen
27 Apr 25 i`* Re: DMA is obsolete3Theo
27 Apr 25 i +- Re: DMA is obsolete1MitchAlsup1
28 Apr 25 i `- Re: DMA is obsolete1Lawrence D'Oliveiro
26 Apr 25 `* Re: DMA is obsolete27MitchAlsup1
27 Apr 25  +* Re: DMA is obsolete2Theo
27 Apr 25  i`- Re: DMA is obsolete1MitchAlsup1
1 May 25  `* Re: DMA is obsolete24Dan Cross
1 May 25   `* Re: DMA is obsolete23MitchAlsup1
2 May 25    `* Re: DMA is obsolete22Dan Cross
2 May 25     +* Re: DMA is obsolete17Anton Ertl
2 May 25     i`* Re: DMA is obsolete16Dan Cross
3 May 25     i +* Re: DMA is obsolete13Anton Ertl
3 May 25     i i+- Re: DMA is obsolete1Robert Finch
3 May 25     i i+* Re: DMA is obsolete10Dan Cross
3 May 25     i ii`* IP (was: DMA is obsolete)9Stefan Monnier
3 May 25     i ii `* Re: IP (was: DMA is obsolete)8Thomas Koenig
3 May 25     i ii  `* Re: IP (was: DMA is obsolete)7John Levine
3 May 25     i ii   `* Re: IP (was: DMA is obsolete)6Dan Cross
4 May 25     i ii    `* Re: IP5Stefan Monnier
4 May 25     i ii     `* Re: IP4Dan Cross
4 May 25     i ii      `* Re: IP3Thomas Koenig
4 May 25     i ii       +- Re: IP1Bill Findlay
4 May 25     i ii       `- Re: IP1Lawrence D'Oliveiro
4 May 25     i i`- Re: DMA is obsolete1Lawrence D'Oliveiro
4 May 25     i +- Re: DMA is obsolete1MitchAlsup1
21 May13:36     i `- Re: DMA is obsolete1Dan Cross
2 May 25     `* Re: DMA is obsolete4MitchAlsup1
3 May 25      `* Re: DMA is obsolete3Terje Mathisen
4 May 25       `* ND-10 (was Re: DMA is obsolete)2Lars Poulsen
4 May 25        `- Re: ND-10 (was Re: DMA is obsolete)1Lawrence D'Oliveiro

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