Re: DMA is obsolete

Lars Poulsen <lars@cleo.beagle-ears.com> wrote:

What is the difference between DMA and message-passing to another core
doing CMOV loop at the ISA level?
 
DMA means doing that it the micro-engine instead of at the ISA level.
Same difference.
 
What am I missing?

Width and specialisation.

You can absolutely write a DMA engine in software.  One thing that is
troublesome is that the CPU datapath might be a lot narrower than the number
of bits you can move in a single cycle.  eg on FPGA we can't clock logic
anywhere near the DRAM clock so we end up making a very wide memory bus that
runs at a lower clock - 512/1024/2048/...  bits wide.  You can do that in a
regular ISA using vector registers/instructions but it adds complexity you
don't need.

The other is that there's often some degree of marshalling that needs to
happen - reading scatter/gather lists, formatting packets the right way for
PCIe, filling in the right header fields, etc.  It's more efficient to do
that in hardware than it is to spend multiple instructions per packet doing
it.  Meanwhile the DRAM bandwidth is being wasted.

Of course you can customise your ISA with extra instructions for doing the
heavy lifting, but then arguably it's not really a CPU any more, it's a
'programmable DMA engine'.  The line between the two becomes very blurred.

What you might also have is a hard datapath that's orchestrated by a
tightly-coupled microcontroller.  Then you get the ability to have an engine
with good performance while being able to more flexibly program it, without
having to make a strange vector CPU.

It's easy to make 'a' DMA, but you want to push the maximum bandwidth that
the memory/interconnect can achieve and all the tricks are about getting
there.

Theo