It can in theory:
1) flush the main CPU's pipeline
2) inject a cache line into the pipeline (instructions + constants)
3) request a mapping of architectural to physical register
4) read/write a physical register value
5) stall the CPU pipeline
6) trigger single step mode
Also
Dump the trace buffer.
It has its own monitor program. Interface is with a serial port.
The CPU books I have do not cover a test/debug interface for the processor, so I am winging it a bit.
I figure with the ability to inject instructions just about anything could be accomplished albeit slowly.
| Date | Sujet | # | Auteur | |
| 17 Apr 25 |  Re: register sets | 56 | Robert Finch | |
| 17 Apr 25 |  Re: register sets | 53 | Stephen Fuld | |
| 17 Apr 25 |   Re: register sets | 1 | Robert Finch | |
| 17 Apr 25 | Re: register sets | 46 | MitchAlsup1 | |
| 18 Apr 25 |  Re: register sets | 45 | Robert Finch | |
| 18 Apr 25 |  Re: register sets | 44 | MitchAlsup1 | |
| 20 Apr 25 | Re: register sets | 43 | Robert Finch | |
| 21 Apr 25 | Re: auto predicating branches | 42 | Robert Finch | |
| 21 Apr 25 | Re: auto predicating branches | 41 | Anton Ertl | |
| 21 Apr 25 | Is an instruction on the critical path? (was: auto predicating branches) | 1 | Anton Ertl | |
| 21 Apr 25 | Re: auto predicating branches | 39 | MitchAlsup1 | |
| 22 Apr 25 | Re: auto predicating branches | 38 | Anton Ertl | |
| 22 Apr 25 | Re: auto predicating branches | 1 | MitchAlsup1 | |
| 22 Apr 25 | Re: auto predicating branches | 36 | Anton Ertl | |
| 22 Apr 25 | Re: auto predicating branches | 35 | MitchAlsup1 | |
| 23 Apr 25 | Re: auto predicating branches | 3 | Stefan Monnier | |
| 23 Apr 25 | Re: auto predicating branches | 2 | Anton Ertl | |
| 25 Apr 25 | Re: auto predicating branches | 1 | MitchAlsup1 | |
| 23 Apr 25 | Re: auto predicating branches | 31 | Anton Ertl | |
| 23 Apr 25 | Re: auto predicating branches | 30 | MitchAlsup1 | |
| 24 Apr 25 | Re: asynch register rename | 29 | Robert Finch | |
| 27 Apr 25 | Re: fractional PCs | 28 | Robert Finch | |
| 27 Apr 25 | Re: fractional PCs | 27 | MitchAlsup1 | |
| 28 Apr 25 | Re: fractional PCs | 26 | Robert Finch | |
| 28 Apr 25 | Re: fractional PCs | 15 | MitchAlsup1 | |
| 29 Apr 25 | Re: fractional PCs | 14 | Robert Finch | |
| 5 May 25 | Re: control co-processor | 13 | Robert Finch | |
| 5 May 25 | Re: control co-processor | 12 | Al Kossow | |
| 5 May 25 | Re: control co-processor | 11 | Stefan Monnier | |
| 6 May 25 | Re: control co-processor | 3 | MitchAlsup1 | |
| 7 May 25 | Re: control co-processor | 1 | MitchAlsup1 | |
| 15 Jul 25 | Re: control co-processor | 1 | MitchAlsup1 | |
| 7 May 25 | Scan chains (was: control co-processor) | 7 | Stefan Monnier | |
| 7 May 25 | Re: Scan chains (was: control co-processor) | 2 | Al Kossow | |
| 7 May 25 | Re: Scan chains | 1 | Stefan Monnier | |
| 7 May 25 | Re: Scan chains | 3 | MitchAlsup1 | |
| 7 May 25 | Re: Scan chains | 2 | Stefan Monnier | |
| 8 May 25 | Re: Scan chains | 1 | MitchAlsup1 | |
| 15 Jul 25 | Re: Scan chains | 1 | MitchAlsup1 | |
| 29 Apr 25 | Re: fractional PCs | 10 | Robert Finch | |
| 29 Apr 25 | Re: fractional PCs | 9 | MitchAlsup1 | |
| 30 Apr 25 | Re: fractional PCs | 8 | Robert Finch | |
| 30 Apr 25 | Re: fractional PCs | 6 | Thomas Koenig | |
| 1 May 25 | Re: fractional PCs | 1 | Robert Finch | |
| 2 May 25 | Re: fractional PCs | 4 | moi | |
| 2 May 25 | Re: millicode, extracode, fractional PCs | 2 | John Levine | |
| 2 May 25 | Re: millicode, extracode, fractional PCs | 1 | moi | |
| 2 May 25 | Re: fractional PCs | 1 | moi | |
| 30 Apr 25 | Re: fractional PCs | 1 | MitchAlsup1 | |
| 15 Jul 25 | Re: register sets | 5 | John Savard | |
| 15 Jul 25 | Re: register sets | 4 | MitchAlsup1 | |
| 19 Jul 25 | Re: register sets | 3 | Robert Finch | |
| 19 Jul 25 | Re: register sets | 2 | Anton Ertl | |
| 19 Jul 25 | Re: register sets | 1 | MitchAlsup1 | |
| 15 Jul 25 | Re: register sets | 2 | John Savard | |
| 15 Jul 25 | Re: register sets | 1 | MitchAlsup1 |
Les messages affichés proviennent d'usenet.