Re: Why I've Dropped In

On Thu, 22 May 2025 6:51:05 +0000, David Chmelik wrote:

What is Concertina 2?

It is the architecture described at
http://www.quadibloc.com/arch/ct22int.htm
at the moment.
Basically, I take a RISC-style architecture, with a set of 32 general
registers and 32 floating-point registers, and only 32 bit instructions,
and try to squeeze in some extra stuff.
The first thing I squeeze in is base-index addressing, so that the
contents of two registers, not just one, are added to the displacement
to get the effective address. This CISC feature makes it simpler to work
with arrays in memory.
The second thing I squeeze in is to allow programs to optionally make
use of VLIW features. Programs are organized into blocks of eight
instructions; this is usually ignored, but if the first instruction in a
block happens to be of a special form, then it can supply things like
instruction predication and explicit indication of parallelism. It can
also extend the instruction set, to allow variable-length instructions,
encoded in a fashion that lets instruction decoding for all the
instructions in a block take place in parallel, just as was possible
when all the instructions were the same length.
The capability of working with data in variable-length schemes is a
minor extra feature which I may include when the design gets fully
fleshed out.
John Savard