Sujet : Re: Why I've Dropped In
De : quadibloc (at) *nospam* gmail.com (quadibloc)
Groupes : comp.archDate : 11. Jun 2025, 15:12:04
Autres entêtes
Organisation : novaBBS
Message-ID : <48c03284118d9d68d6ecf3c11b64a76b@www.novabbs.com>
References : 1 2 3 4 5
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On Wed, 11 Jun 2025 5:56:33 +0000, Thomas Koenig wrote:
Having different classes of base and index registers is very
un-RISCy, and not generally a good idea. General purpose registers
is one of the great things that the /360 got right, as the VAX
later did, and the 68000 didn't.
This is true.
However, if the memory reference instructions had 5 bits for the
destination register, 5 bits for the index register, 5 bits for the base
register, and 16 bits for the displacement, then there would only be one
bit left for the opcode.
As I required 5 bits for the opcode to allow both loads and stores for
several sizes each of integer and floating-point operands, I had to save
bits somewhere.
Therefore, I reduced the index register and base register fields to
three bits each, using only some of the 32 integer registers for those
purposes.
A standard RISC would not have an index register field, only a base
register field, meaning array accesses would require multiple
instructions.
The 68000 only had base-index addressing with an 8-bit displacement;
true base-index addressing with a normal displacement arrived in the
68020, but the instructions using it took up 48 bits.
I'll agree the 68000 architecture did have a serious mistake. It was
CISC, so it didn't need to be RISC-like, but the special address
registers should only have been used as base registers; the regular
arithmetic registers should have been the ones used as index registers,
since one has to do arithmetic to produce valid index values.
The separate address registers would then have been useful, by allowing
those of the eight (rather than 16 or 32) general registers that would
have been used up holding static base register values to be freed up.
John Savard