Re: register sets

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Sujet : Re: register sets
De : mitchalsup (at) *nospam* aol.com (MitchAlsup1)
Groupes : comp.arch
Date : 19. Jul 2025, 21:02:22
Autres entêtes
Organisation : Rocksolid Light
Message-ID : <7373c1972a2f325a64311dcb4a2d7ee6@www.novabbs.org>
References : 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
User-Agent : Rocksolid Light
On Sat, 19 Jul 2025 16:37:15 +0000, Anton Ertl wrote:

Robert Finch <robfi680@gmail.com> writes:
I am wondering if there is a way to tag each register individually with
the process id (app id) and involve the register renamer such that there
is no need to save / restore the register context.
>
Simulteneous multi-threading (SMT) tags each microinstruction and
instruction with a (hardware) thread id; two hardware threads may
belong to different processes.  How registers are handled probably
depends on the actual implementation, not sure if any implementation
tags it, but they all can tell which physical register belongs to
which hardware thread (if any).  And as long as you are not using more
hardware threads than your hardware has available, there is no need to
switch contexts, and therefore no need to save and restore it.
Correct, you tag the SMT instruction through the pipeline not the
registers in the files.
Also note:: SMT requires that the RM and FPflags be piped through
the FUs.

- anton

Date Sujet#  Auteur
31 Oct 24 * Page fetching cache controller59Robert Finch
31 Oct 24 +- Re: Page fetching cache controller1MitchAlsup1
6 Nov 24 `* Re: Q+ Fibonacci57Robert Finch
17 Apr 25  `* Re: register sets56Robert Finch
17 Apr 25   +* Re: register sets53Stephen Fuld
17 Apr 25   i+- Re: register sets1Robert Finch
17 Apr 25   i+* Re: register sets46MitchAlsup1
18 Apr 25   ii`* Re: register sets45Robert Finch
18 Apr 25   ii `* Re: register sets44MitchAlsup1
20 Apr 25   ii  `* Re: register sets43Robert Finch
21 Apr 25   ii   `* Re: auto predicating branches42Robert Finch
21 Apr 25   ii    `* Re: auto predicating branches41Anton Ertl
21 Apr 25   ii     +- Is an instruction on the critical path? (was: auto predicating branches)1Anton Ertl
21 Apr 25   ii     `* Re: auto predicating branches39MitchAlsup1
22 Apr 25   ii      `* Re: auto predicating branches38Anton Ertl
22 Apr 25   ii       +- Re: auto predicating branches1MitchAlsup1
22 Apr 25   ii       `* Re: auto predicating branches36Anton Ertl
22 Apr 25   ii        `* Re: auto predicating branches35MitchAlsup1
23 Apr 25   ii         +* Re: auto predicating branches3Stefan Monnier
23 Apr 25   ii         i`* Re: auto predicating branches2Anton Ertl
25 Apr 25   ii         i `- Re: auto predicating branches1MitchAlsup1
23 Apr 25   ii         `* Re: auto predicating branches31Anton Ertl
23 Apr 25   ii          `* Re: auto predicating branches30MitchAlsup1
24 Apr 25   ii           `* Re: asynch register rename29Robert Finch
27 Apr 25   ii            `* Re: fractional PCs28Robert Finch
27 Apr 25   ii             `* Re: fractional PCs27MitchAlsup1
28 Apr 25   ii              `* Re: fractional PCs26Robert Finch
28 Apr 25   ii               +* Re: fractional PCs15MitchAlsup1
29 Apr 25   ii               i`* Re: fractional PCs14Robert Finch
5 May 25   ii               i `* Re: control co-processor13Robert Finch
5 May 25   ii               i  `* Re: control co-processor12Al Kossow
5 May 25   ii               i   `* Re: control co-processor11Stefan Monnier
6 May 25   ii               i    +* Re: control co-processor3MitchAlsup1
7 May 25   ii               i    i+- Re: control co-processor1MitchAlsup1
15 Jul 25   ii               i    i`- Re: control co-processor1MitchAlsup1
7 May 25   ii               i    `* Scan chains (was: control co-processor)7Stefan Monnier
7 May 25   ii               i     +* Re: Scan chains (was: control co-processor)2Al Kossow
7 May 25   ii               i     i`- Re: Scan chains1Stefan Monnier
7 May 25   ii               i     +* Re: Scan chains3MitchAlsup1
7 May 25   ii               i     i`* Re: Scan chains2Stefan Monnier
8 May 25   ii               i     i `- Re: Scan chains1MitchAlsup1
15 Jul 25   ii               i     `- Re: Scan chains1MitchAlsup1
29 Apr 25   ii               `* Re: fractional PCs10Robert Finch
29 Apr 25   ii                `* Re: fractional PCs9MitchAlsup1
30 Apr 25   ii                 `* Re: fractional PCs8Robert Finch
30 Apr 25   ii                  +* Re: fractional PCs6Thomas Koenig
1 May 25   ii                  i+- Re: fractional PCs1Robert Finch
2 May 25   ii                  i`* Re: fractional PCs4moi
2 May 25   ii                  i +* Re: millicode, extracode, fractional PCs2John Levine
2 May 25   ii                  i i`- Re: millicode, extracode, fractional PCs1moi
2 May 25   ii                  i `- Re: fractional PCs1moi
30 Apr 25   ii                  `- Re: fractional PCs1MitchAlsup1
15 Jul 25   i`* Re: register sets5John Savard
15 Jul 25   i `* Re: register sets4MitchAlsup1
19 Jul 25   i  `* Re: register sets3Robert Finch
19 Jul 25   i   `* Re: register sets2Anton Ertl
19 Jul 25   i    `- Re: register sets1MitchAlsup1
15 Jul 25   `* Re: register sets2John Savard
15 Jul 25    `- Re: register sets1MitchAlsup1

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