Sujet : Re: Why I've Dropped In
De : quadibloc (at) *nospam* invalid.invalid (John Savard)
Groupes : comp.archDate : 26. Jul 2025, 07:14:47
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <1061ron$1acij$1@dont-email.me>
References : 1 2 3 4 5
User-Agent : Pan/0.146 (Hic habitat felicitas; d7a48b4 gitlab.gnome.org/GNOME/pan.git)
On Thu, 22 May 2025 17:42:14 +0000, MitchAlsup1 wrote:
This creates "interesting" situations with respect to instruction
formatting and to the requirements of constants in support of those
instructions; and interesting requirements in other areas of ISA.
Oh, there are indeed challenges, but they're hardly insurmountable.
Compilers are the obvious case. Since the instruction set is built
around 32-bit instructions, obviously the architecture will need to
be running in conventional mode for compilation.
The data width is, of course, specified by the block header. It
isn't a switchable mode. So a program can have memory allocated to
it of different widths, put pointers to those regions of memory in
different base registers, and include code operating on data of
those various lengths.
So the compiler can call subroutines designed to craft things like
36-bit floats for inclusion in object modules. From data placed in
registers by normal code.
John Savard