Re: D correctly simulated by H never halts

On 5/29/2024 11:59 AM, Chris M. Thomasson wrote:
[...]

Why do you say that its an x64 instruction? cmpxchg8b is on IA-32. I used it all the time back in the day. Here is some of my old assembly code for a DWCAS. By the way, DWCAS means double-width compare-and-swap:
 https://web.archive.org/web/20060214112539/http://appcore.home.comcast.net/appcore/src/cpu/i686/ac_i686_masm_asm.html

[...]

It's prototype is:
 http://appcore.home.comcast.net/appcore/include/cpu/i686/ac_i686_h.html

Oops! wrong link:
https://web.archive.org/web/20060214112519/http://appcore.home.comcast.net/appcore/include/cpu/i686/ac_i686_h.html
Sorry about that. Ugggh. ;^o

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AC_SYS_APIEXPORT
int AC_CDECL
np_ac_i686_atomic_dwcas_fence
( void*,
   void*,
   const void* );
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