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On 11/12/2024 18:22, Michael S wrote:On Wed, 11 Dec 2024 16:15:25 +0100
David Brown <david.brown@hesbynett.no> wrote:
>
Suffice it to say that as far as code generation is concerned, the
Cortex-A devices on the RPi's are completely different from the
Cortex-M devices in microcontrollers. It's like comparing the
80286 with the Z80A.
With exception of RPi1, saying so would be an exaggeration.
RPi2 through 5 are technically capable to run Thumb2-encoded user
level routines.
I did not know that the 64-bit Cortex-A devices could run 32-bit
Thumb2-encoded instructions. That does reduce the difference
somewhat.
>
Compilers targeting 64-bit ARM would generate 64-bit (AArch64)
instructions, which are of course significantly different.
But
perhaps a compiler targeting 32-bit Cortex-A devices might be able to
generate Thumb2 instructions.
>
However, you would not expect binary compatibility between code
generated for a 32-bit Cortex-M device and a Cortex-A platform, even
if it supports Thumb2 instructions - you have major differences in
the ABI, memory layouts, and core features beyond the basic registers.
>
May be, mutual incompatibility with MCUs would become true again in
the next generation of RPi. But more likely it would not happen
until RPi7.
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