Sujet : Re: int a = a (Was: Bart's Language)
De : david.brown (at) *nospam* hesbynett.no (David Brown)
Groupes : comp.lang.cDate : 19. Mar 2025, 11:40:32
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <vre6v0$lb74$1@dont-email.me>
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On 18/03/2025 23:27, Janis Papanagnou wrote:
On 18.03.2025 20:51, David Brown wrote:
[...] A brief check suggests that gcc will generate code as it
would for "int a = 0;", but it is certainly possible for a compiler to
avoid any kind of initialisation here and let the register or stack slot
used for "a" stay as it was. That would be a pretty minor efficiency
improvement,
but optimised code is mostly the sum of lots of tiny improvements.
Interesting view. I've learned that such Peephole Optimizations were
not what contribute to optimizations most. It's rather transformations
of structure of various forms that is what "mostly" matters. - That's
what I've learned many decades ago, of course. - So I'm curious where
you've got that view from. (Some reference, maybe? Or was that just a
personal opinion?)
Some optimisations have big effects, certainly - good register allocation and lifetime analysis, and optimisations that move code around (loop transformations, inlining, etc.) are the big factors. However, in modern compilers there are lots of minor optimisations that only apply in a few cases and only help a few percent in those cases. Each does little on its own, but in sum the results can be significant.
But you are right that it is not really fair to say that optimisation is "mostly" the sum of tiny improvements - it's a small number of big and important transforms, and /then/ the sum of a large number of small ones.
One complicating factor about these small optimisations is that the observable effect on code speed is highly dependent on the rest of the code and the type of processor involved. A peephole optimisation that removes an extra register-to-register move will save a cycle on a microcontroller, but on an x86 system such a move might be merged in the register renaming hardware of the cpu's prefetch queues and thus disappear entirely. Reducing instruction cycles matters a lot on microcontrollers, while on a big processor they might not make any difference if the cpu is waiting for memory.