Re: [OT] SPARC (was Re: The integral type 'byte')

On 28.03.2025 11:26, Michael S wrote:

 
You didn't ever programmed in SPARC asm. Your reading of SPARC
documents was so shallow that you didn't pay attention to highly
visible distinguishing feature as branch delay slot.

Yes. I clearly said that; I spoke about a technical detail that
I found interesting, no more, no less.

Could I guess that you didn't ever programmed in 68K asm, x86 asm,
NS32k asm, MIPS asm etc... ? Could I guess that your reading of
respective ISA docs was also similarly shallow? Could I guess that the
only non-8-bitters that you ever programmed in asm were one or couple
of TMS3202x DSPs?

Just to understand; do you consider the 68k to be an "8-bitter"?
(Are you taking the address bus, the data bus, or the addressable
memory unit as the interesting "N-bitter" number?)

My engagement with each CPU I clearly mentioned in my posts.
For your convenience I can summarize;

6502 - programmed with it (at an office equipment shop)
SC 61860 - programmed with it (at home)
some Intel (I forgot the number) - in a University course
8080 - at the University
M1/M2/M3 [Seegmüller] - programmed with it (University)
68000 - programmed with it (on an Atari I owed)
TMS 320 C25 - programmed with it (at the DLR)
SPARC - read briefly about it
NS 32016/32 - read about it

I never spoke about MIPS here, nor about other CPUs of systems
that I worked with (e.g. Power PC). I also never programmed the
CPU of my current computers at home on assembler level; I don't
even recall what CPUs they have. - Since the late 1989 I didn't
care any more about CPUs, let alone about their programming; I
was solely using high-level languages.

HTH.

Janis