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On 28.03.2025 03:03, Chris M. Thomasson wrote:Some people would put a MEMBAR instruction in a branch delay slot. Well, that can screw up the memory order from time to time. I remember reading about it when I was learning how to code SPARC assembly language. It's a bit hard for me to remember why. It think that said it could be speculated, and therefor not execute the MEMBAR and ruin the integrity of the lock/wait-free algo that needed it. This was right around the time when Sun gave me a SunFire T2000 for my vZoom project in the CoolThreads contest. I think its on the wayback machine. Let me check...On 3/27/2025 6:59 PM, Janis Papanagnou wrote:As mentioned somewhere upthread I haven't ever programmed a SPARC on>>
But there were ideas! But not only the interesting ideas (like the
frame shift on the stack [SPARC]; one detail I memorized)
It's been a while since I coded up raw SPARC ASM. Remember that branch
delay slot? Ever use it with a MEMBAR instruction? Shit would hit the fan.
assembler level, just studied some documents. I'm not even sure the
term "frame shift on the stack" that I used is accurate or correct;
it's just an informal description of a technical detail that I had
considered to be interesting. (Instead of copying parameters/results
with function calls between callers and callee you could just shift
a "stack window" by adjusting a register (or so).
So, no, I cannot remember a "branch delay slot". - Sorry. - Want to
elaborate on the story?
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