Sujet : Re: x86S Specification
De : camiel.vanderhoeven (at) *nospam* vmssoftware.com (Camiel Vanderhoeven)
Groupes : comp.os.vmsDate : 03. Nov 2024, 17:38:56
Autres entêtes
Organisation : A noiseless patient Spider
Message-ID : <8e6dec20-d4b8-7301-30f0-8d92eb8e79cc@vmssoftware.com>
References : 1 2 3 4 5 6
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Arne Vajhøj wrote:
On 11/3/2024 9:06 AM, Camiel Vanderhoeven wrote:
Arne Vajhøj wrote:
x86-64 in long mode only support 2 modes in PTE's, so
VMS x86-64 is a hardware 2 mode OS 4 mode OS - U in ring 3,
S, E and K in ring 0.
>
Not exactly.
>
Ring 3 is used for Exec, Super, and User
>
Ring 0 is used for kernel and for transitions between modes (SWIS)
>
Running Exec and Super in ring 0 would blow away the separation (which, I might add, is there more for stability than for security, before I unintentionally re-start that debate)
You are more afraid that DCL or RMS would step on VMS than
applications would step on DCL or RMS?
No, certainly not. That is why we have a separate set of page tables for each mode. For instance, a page that has kernel write / exec read protections is represented by the following PTEs in these 4 sets of page tables:
kernel mode: S(upervisor) W(riteable)
exec mode: U(ser) R(eadable)
super mode: not present
user mode: not present
Camiel
x86S Specification
Re: x86S Specification