Re: uP port mapping

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Sujet : Re: uP port mapping
De : tnp (at) *nospam* invalid.invalid (The Natural Philosopher)
Groupes : sci.electronics.design comp.sys.raspberry-pi
Date : 12. Sep 2024, 16:29:13
Autres entêtes
Organisation : A little, after lunch
Message-ID : <vbv1c9$a8c1$2@dont-email.me>
References : 1
User-Agent : Mozilla Thunderbird
On 10/09/2024 20:12, john larkin wrote:
Something I've wondered about:
 Suppose we have a c program running on some little uP, and it has some
integer variable value, 8 or 12 bits or something, and wants to drive
a parallel DAC off-chip.
 The msb...lsb bits of the variable obviously have to get to the right
pins of the DAC.
 So, in general, how does one pick the physical i/o port pins on the
uP, to get the order right? The PCB layout is easiest if we just wire
the DAC to the handiest port pins.
TBH once you go to at least 2 layer and dont worry about super small size, that isn't very hard. You can use traces with via's as jumpers. Once the board is done there is no added cost
Helped by the fact that the PIO pins on the boards go in order IIRC.

 One could test and bit-bang each bit and port individually, and then
strobe the DAC, but that's inelegant.
 
Wastes CPU too.

In the RP2040 chip, one can apparently write to a register in a
PIO/state machine block, where each bit of the register can be
assigned to drive a physical port pin. I think there are some
constraints on the selected pins.
I think so, though I have not found the need to use it.
Obviously for deeply parallel operations that works.  But modern practice is to implement some sort of high speed serial bus.
In general that is fast enough for a DAC anyway
--
For in reason, all government without the consent of the governed is the very definition of slavery.
Jonathan Swift

Date Sujet#  Auteur
10 Sep 24 * uP port mapping8john larkin
12 Sep 24 +- Re: uP port mapping1The Natural Philosopher
12 Sep 24 `* Re: uP port mapping6Theo
12 Sep 24  `* Re: uP port mapping5The Natural Philosopher
12 Sep 24   `* Re: uP port mapping4john larkin
12 Sep 24    +* Re: uP port mapping2Theo
13 Sep 24    i`- Re: uP port mapping1The Natural Philosopher
13 Sep 24    `- Re: uP port mapping1The Natural Philosopher

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