Re: DD correctly emulated by HHH --- Totally ignoring invalid rebuttals ---PSR---

Am Sat, 08 Mar 2025 17:23:41 -0600 schrieb olcott:

On 3/8/2025 4:58 PM, dbush wrote:

On 3/8/2025 5:42 PM, olcott wrote:

On 3/8/2025 9:00 AM, dbush wrote:

On 3/8/2025 9:03 AM, olcott wrote:

>
Apparently you don't understand that inputs to a simulating
termination analyzer specifying infinite recursion or recursive
emulation cannot possibly reach their own final state and terminate
normally.

>
Apparently you don't understand that inputs to a termination
analyzer, simulating or otherwise, are specified by the specification
that is the halting function:
(<X>,Y) maps to 1 if and only if X(Y) halts when executed directly
(<X>,Y) maps to 0 if and only if X(Y) does not halt when executed
And HHH(DD)==0 fails to meet the above specification

>
*THIS IS A SEMANTIC TAUTOLOGY THUS IMPOSSIBLY FALSE* Replacing the
code of HHH with an unconditional simulator and subsequently running
HHH(DD) cannot possibly reach its own "ret" instruction and terminate
normally because DD calls HHH(DD) in recursive emulation.

But HHH is not an unconditional simulator. It is supposed to break the
cycle.

It must if it is to be classified as a halt decider or termination
analyzer as per the definition.

 
In other words you believe that HHH should just ignore the fact that DD
makes a call that prevents DD from ever reaching its own final state?

On the contrary, the call to HHH is guaranteed to return.

Neither HHH nor DD have any idea that DD calls its own emulator in
recursive emulation.
None-the-less both HHH and anyone with sufficient technical competence
can see that DD correctly emulated by HHH cannot possibly reach its own
final state.

Not reaching *the* final state (which undoubtedly exists) cannot be
called a correct simulation.

--
Am Sat, 20 Jul 2024 12:35:31 +0000 schrieb WM in sci.math:
It is not guaranteed that n+1 exists for every n.