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On 7/28/2024 3:04 AM, Mikko wrote:That does not alter the fact that you lied above. Therefore the termOn 2024-07-27 13:55:56 +0000, olcott said:I make my point mere clearly here:
On 7/27/2024 1:54 AM, Mikko wrote:It is lying to paraphrase so that the original meaning is not preserved.On 2024-07-26 13:58:54 +0000, olcott said:I am not lying I am paraphrasing so that we can come to a mutual
On 7/26/2024 3:05 AM, Mikko wrote:You are lying again. That is not the same in other words, and I amOn 2024-07-24 13:38:08 +0000, olcott said:In other words you are saying that it is absolutely impossible
On 7/24/2024 4:01 AM, Mikko wrote:No, it isn't. Abortion of simulation is a deviation form x86 macineOn 2024-07-23 14:41:11 +0000, olcott said:That is off topic. I am only referring to a sequence of
On 7/23/2024 2:32 AM, Mikko wrote:Does the simulator that simulates the beginning and end of theOn 2024-07-22 15:05:41 +0000, olcott said:When-so-ever there are two hypothetical possible way to encode
On 7/22/2024 6:05 AM, Mikko wrote:No, it is not. The "must" and "non-halting" belong to different worlds.On 2024-07-20 15:28:31 +0000, olcott said:*You can't even get my words correctly*
void DDD()For a partial analyzer or deciders this is not always required.
{
HHH(DDD);
}
int main()
{
DDD();
}
(a) Termination Analyzers / Partial Halt Deciders must halt
this is a design requirement.
A termination analyzer must report on the behavior of at least
one input for all of the inputs of this one input. This is
met when a termination analyzer analyzes an input having no inputs.
A partial halt decider must correctly determine the halt status
of at least one input and its specific input (if any).
HHH is both a partial halt decider and a termination analyzer
for DDD and a few other inputs having no input.
I am talking about hypothetical possible ways that HHH could be encoded.(b) Every simulating termination analyzer HHH eitherThis must be interpreted to mean that a simulating termination analyzer
aborts the simulation of its input or not.
may abort its simulation for some simulated abort and simulate others
to the termination.
(a) HHH(DDD) is encoded to abort its simulation.
(b) HHH(DDD) is encoded to never abort its simulation.
(a) HHH(DDD) is encoded to abort its simulation.(c) Within the hypothetical case where HHH does not abortThe case is not very hypothetical. Given the HHH you already have,
the simulation of its input {HHH, emulated DDD and executed DDD}
never stop running.
it is fairly easy to construct the "hypothetical" HHH and see what
it actually does.
(b) HHH(DDD) is encoded to never abort its simulation.
Therefore (a) is correct and (b) is incorrect according to theThis violates the design requirement of (a) therefore HHH mustThe violation simply means that the "hypothetical" HHH is not a
abort the simulation of its input.
termination analyzer of partial halt decider in sense (a). What
it "must" be or do depends on the requirements.
design requirements for HHH that it must halt.
It is also a truism that any input that must be aborted
is a non-halting input.
The word "must" blongs to requirements. The word "non-halting" is a
feature of a program. They are unrelated, so one cannot be inferred
from the other.
a simulating halt decider for a specific input
(a) one aborts its simulation of DDD
(b) never aborts its simulation of DDD
simulated computation but skips a part in ghe middle belong to
class (a) or class (b)?
1 to N x86 machine language instructions simulated according
to the x86 semantic meaning of these instructions.
language semantics. What I ask about does not deviate more.
to make an x86 program that is an x86 emulator that correctly
emulates a finite number of instructions of non-terminating
input x86 machine code.
not saying what you falsely claim.
understanding.
[Any honest person that knows the x86 language can see...]
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