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On 8/9/24 9:52 PM, olcott wrote:So you defining whole notion simulating termination analyzersOn 8/9/2024 8:46 PM, Richard Damon wrote:Right, becuase to correctly emulate, you need to correct emulate EVERY instruction, not just some of them.On 8/9/24 9:25 PM, olcott wrote:>On 8/9/2024 8:05 PM, Richard Damon wrote:>On 8/9/24 8:52 PM, olcott wrote:>>>
When we look at every HHH that can possibly exist then
we see that DDD correctly emulated by each one of these
cannot possibly reach its "return" instruction halt state.
But ONLY ONE of those actuallu "correctly emulates" the input, and that one isn't a decider.
>
In other words you are trying to keep getting away
with the bald-faced lie that when HHH correctly
emulates N instructions of DDD (where N > 0) that
it did not correctly emulate any instructions of DDD.
>
*Give it up you lost you are stuck in repeat mode*
*Give it up you lost you are stuck in repeat mode*
*Give it up you lost you are stuck in repeat mode*
>
So, I guess you don't understand English.
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Where did I say that simulating N instructions correctly is not simulating ANY instructions correctly.
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*Shown above*
"But ONLY ONE of those actuallu "correctly emulates" the input..."
>
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