Re: Defining a correct simulating halt decider

Op 03.sep.2024 om 15:29 schreef olcott:

On 9/3/2024 2:15 AM, Fred. Zwarts wrote:

Op 03.sep.2024 om 00:22 schreef olcott:

On 9/2/2024 12:52 PM, Fred. Zwarts wrote:

Op 02.sep.2024 om 18:38 schreef olcott:

A halt decider is a Turing machine that computes
the mapping from its finite string input to the
behavior that this finite string specifies.
>
If the finite string machine string machine
description specifies that it cannot possibly
reach its own final halt state then this machine
description specifies non-halting behavior.
>
A halt decider never ever computes the mapping
for the computation that itself is contained within.
>
Unless there is a pathological relationship between
the halt decider H and its input D the direct execution
of this input D will always have identical behavior to
D correctly simulated by simulating halt decider H.
>
*Simulating Termination Analyzer H Not Fooled by Pathological Input D*
https://www.researchgate.net/ publication/369971402_Simulating_Termination_Analyzer_H_is_Not_Fooled_by_Pathological_Input_D
>
A correct emulation of DDD by HHH only requires that HHH
emulate the instructions of DDD** including when DDD calls
HHH in recursive emulation such that HHH emulates itself
emulating DDD.

>
Indeed, it should simulate *itself* and not a hypothetical other HHH with different behaviour.
If HHH includes code to see a 'special condition' and aborts and halts, then it should also simulate the HHH that includes this same code and

>
>
DDD has itself and the emulated HHH stuck in recursive emulation.
>
void DDD()
{
   HHH(DDD);
   return;
}

>
It is not DDD. It is HHH that has the problem when trying to simulate itself.

Olcott removed the proof that I am right:
        int main() {
          return HHH(main);
        }
where HHH halts, but claims that it does not halt. No DDD needed to prove that HHH reports false negatives.
Since he cannot prove that I am wrong, he thinks an ad hominem attack will help.

 It does this correctly yet beyond your intellectual capacity.
 

Then he shows again the 'trace' of an incorrect simulation.

_DDD()
[00002172] 55         push ebp      ; housekeeping
[00002173] 8bec       mov ebp,esp   ; housekeeping
[00002175] 6872210000 push 00002172 ; push DDD
[0000217a] e853f4ffff call 000015d2 ; call HHH(DDD)
[0000217f] 83c404     add esp,+04
[00002182] 5d         pop ebp
[00002183] c3         ret
Size in bytes:(0018) [00002183]
 Instructions from machine address 00002172 through
machine address 0000217a are emulated.
 What instruction of DDD do you believe comes next?

Assuming a correct simulation:
The next instruction would be that at 000015d2 in HHH. Then a correct simulation would show how the simulated HHH sees the 'special condition' and returns to DDD, after which the instruction at 0000217f should be simulated, followed by those at 00002182 and 0000218.
This is al in the assumption that the simulation is done by a correct simulator, which is indeed the case in the simulations by the world class simulator and even by HHH1.
But HHH fails to reach this point, because it stops the simulation too soon.
HHH cannot possibly simulate itself correctly up to its end.