Re: DD correctly emulated by HHH --- Totally ignoring invalid rebuttals ---PSR---

On 3/5/2025 11:06 PM, dbush wrote:

On 3/5/2025 11:03 PM, olcott wrote:

On 3/5/2025 9:57 PM, dbush wrote:

On 3/5/2025 10:53 PM, olcott wrote:

On 3/5/2025 9:31 PM, dbush wrote:

On 3/5/2025 10:17 PM, olcott wrote:

On 3/5/2025 7:10 PM, dbush wrote:

>
In other words, you know that what you're working on has nothing to do with the halting problem, but you don't care.

>
In other words I WILL NOT TOLERATE ANY BULLSHIT DEFLECTION.
You have proven that you know these things pretty well SO QUIT THE SHIT!
>

>
You want people to accept that HHH(DD) does in fact report that changing the code of HHH to an unconditional simulator and running HHH(DD) will not halt.
>

>
DD correctly emulated by HHH cannot possibly
reach its own "ret" instruction and terminate normally.

>
In other words, replacing the code of HHH with an unconditional simulator and subsequently running HHH(DD) does not halt, which you previously agreed is correct:
>
On 2/22/2025 1:02 PM, olcott wrote:
 > On 2/22/2025 11:10 AM, dbush wrote:
 >> On 2/22/2025 11:43 AM, olcott wrote:
 >>> The first point is DD correctly simulated by HHH cannot
 >>> possibly terminate normally by reaching its own "return"
 >>> instruction.
 >>
 >> In other words, if the code of HHH is replaced with an unconditional simulator then it can be shown that DD is non-halting and therefore HHH(DD)==0 is correct.
 >>
 >
 > Wow finally someone that totally gets it.
>
>
If you disagree, explain why this is different.
>
In particular, give an example where X correctly emulated by Y is different from replacing the code of Y with an unconditional simulator and subsequently running Y(X).

>
I may not have enough time left to change the subject
and endlessly go through anything but the exact point.
>
The purpose of these posts is so that my posthumous
reviewers will understand.
>

 Last chance:
 Give an example where X correctly emulated by Y is
different from replacing the code of Y with an unconditional simulator
and subsequently running Y(X).
 Failure to do so in your next reply (or within one hour of your next post in this newsgroup) will be taken as your on-the-record admission that they mean the same thing, and that additionally you officially approve of replacing the former with the latter in any of your quotes to make it clear exactly what you're talking about.
 

Let The Record Show that Peter Olcott made the following post in this newsgroup after the above quoted message:
On 3/5/2025 11:41 PM, olcott wrote:
 > No matter WTF HHH is DD cannot possibly reach its "ret"
 > instruction and terminate normally when correctly emulated by HHH.
 > Either this is over your head or you are a liar. There is
 > no third choice.
And has not responded to the quoted message above more than 8 hours after he made the above post.
He has therefore satisfied the requirements stated above for admission of the given statement.  So:
Let The Record Show:
That Peter Olcott:
Has admitted that the following statement (Statement 1):
DD correctly simulated by HHH
Is exactly equivalent to the following statement (Statement 2):
Replacing the code of HHH with an unconditional simulator and subsequently running HHH(DD)
And has given his official permission to anyone responding to his messages to replace Statement 1 with Statement 2 in any of his quoted messages for the purposes of making it clear what he is claiming