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On 3/8/2025 7:54 AM, Richard Damon wrote:Olcott removed the text where I agreed with him. He seems to be stuck in rebuttal mode, so he keeps repeating things about which there is no disagreement.On 3/7/25 9:21 PM, olcott wrote:A proof is anything and everything that shows aOn 3/7/2025 8:00 PM, Richard Damon wrote:>On 3/7/25 8:49 PM, olcott wrote:>On 3/7/2025 10:25 AM, Fred. Zwarts wrote:>Op 07.mrt.2025 om 16:17 schreef olcott:>On 3/7/2025 2:59 AM, Fred. Zwarts wrote:If you do not agree that HHH fails to reach the 'ret' instruction (that world-class simulators do reach, just as the direct execution does), show how it reaches the 'ret' instruction.Op 06.mrt.2025 om 21:13 schreef olcott:>On 3/6/2025 3:13 AM, Fred. Zwarts wrote:>Op 06.mrt.2025 om 04:53 schreef olcott:>On 3/5/2025 9:31 PM, dbush wrote:>On 3/5/2025 10:17 PM, olcott wrote:>On 3/5/2025 7:10 PM, dbush wrote:>>>
In other words, you know that what you're working on has nothing to do with the halting problem, but you don't care.
In other words I WILL NOT TOLERATE ANY BULLSHIT DEFLECTION.
You have proven that you know these things pretty well SO QUIT THE SHIT!
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You want people to accept that HHH(DD) does in fact report that changing the code of HHH to an unconditional simulator and running HHH(DD) will not halt.
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DD correctly emulated by HHH cannot possibly
reach its own "ret" instruction and terminate normally.
Yes, we agree that HHH fails to reach the 'ret' instruction,
Despicably dishonest attempt at the straw-man deception.
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No rebuttal. So, we agree that HHH fails to reach the 'ret' instruction.
Not at all. Trying to get away with changing the subject
WILL NOT BE TOLERATED.
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*set X*
When-so-ever any input to any simulating termination
analyzer calls the simulator that is simulating itself
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*result of set X*
this input cannot possibly reach its own final state
and terminate normally because it remains stuck in
recursive emulation.
But the failure of the PARTIAL emulatipon done by the termination analyzer doesn't show that the input is non-haltiong
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That is stupidly wrong and you know it.
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What is wrong with it?
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statement is necessarily true and impossibly false.
The code 100% perfectly proves exactly what it does,
making any disagreements with what it does necessarily
incorrect.
Apparently you don't understand that inputs to a
simulating termination analyzer specifying infinite
recursion or recursive emulation cannot possibly
reach their own final state and terminate normally.
It is ridiculously stupid to expect a simulating
termination analyzer to continue to simulate an
input that specifies it cannot possibly reach its
own final state and terminate normally.
When anyone says that DD emulated by HHH according to
the semantics of the x86 language can possibly reach
its own"ret" instruction and terminate normally they are
conclusively proven wrong.
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