Re: power supply idea

On 4/24/24 01:17, john larkin wrote:

On Tue, 23 Apr 2024 23:56:44 +0200, Klaus Vestergaard Kragelund
<klauskvik@hotmail.com> wrote:
 

On 23-04-2024 23:47, Klaus Vestergaard Kragelund wrote:

On 22-04-2024 20:09, John Larkin wrote:

On Mon, 22 Apr 2024 17:38:19 -0000 (UTC), "Don" <g@crcomp.net> wrote:
>

John Larkin wrote:

erichpwagner wrote:

John Larkin wrote:

>
If one had, say, a 48 volt power bus, you could hang a half-bridge
switcher to ground, and a lowpass filter out. If the drive has duty
cycle n, the output voltage is 48*n. So we have a programmable power
supply with no feedback, which will be stable into any load.
>
The load regulation will be mediocre, but we could almost sell it
as-is.
>
So now, sense the output voltage and compute the error against the
target, run through a slowish integrator, and tweak the PWM to get
zero output voltage error. Gross transient response is basically the
response of the output filter, with some modest drool from the
integrator.
>
We can constrain the influence range of the integrator, just
enough to
give the regulation that we need. That limits output swing in case
the
feedback is wrong, as one could get from a botched remote sense
connection.
>
https://www.dropbox.com/scl/fi/2fysyvkl4eim7vujhaobh/FFINT_PS_1.jpg?rlkey=rug6yi3cgemi9vvbz8apgboqi&raw=1

>
Looks like you have invented the buck converter.

>
I invented a control algorithm. All the buck chips that I know of are
all feedback driven, and will slam into either rail if the feedback
divider is broken. Blow things up.

>
An algorithm arguably eliminates a 555 triangle generator as a potential
spread spectrum source. LOL. So, what's hidden in plain sight behind all
of your left hand side, symbolic sleight of hand? In other words, how do
you implement your control algorithm?
>
Danke,

>
It's all in plain sight. Well, the guts of the PWM converter isn't,
but that's pretty obvious.
>
The PWM converter, and in fact everything, will be implemented in an
FPGA, with an ADC to pick up the output voltage.
>
May as well go pseudo-random on the spread spectrum part. Any audible
side effects would be hiss, not whine.
>

>
I have done what you propose, but I did not add the spread-spectrum part.
>
If you add a current sense on the output, you can characterize the
non-linearity of the power stage, and do feedforward compensation. So
your response will be snappy. You still have the settle time of the LC
filter, that's harder to counteract with feedforward.
>

One concept I never had time to implement, was to do in circuit
compensation. So in your function test, add a swept current load on the
output at different output voltages, and feed the results to the
feedforward lookup table. That will take care of variations on
components, albeit wont reduce temperature affected errors.

 One of our applications has a fixed, stiff 48 volt supply.  So we
could characterize the switcher output as an ohmic source, and use the
sensed current to null out most or all of those ohms, so the
integrator can have an even smaller influence range. Or even no
integrator! We need a current sensor anyhow.
 Another product will have an isolated dc/dc converter driving the
half-bridge, and it will be fairly soft, nonlinear at that. We will
digitize that 60 volt supply anyhow, so it and the current together
could be compensated. That might require a divide in the FPGA. I'll
ask my FPGA kids if they can divide.
 

division is just like any other operation, it just takes more cycles since since it can't be done in parallel like a multiply