Sujet : Re: Zilog stopping Z80 production
De : invalid (at) *nospam* invalid.invalid (Edward Rawde)
Groupes : sci.electronics.designDate : 25. Apr 2024, 04:03:40
Autres entêtes
Organisation : BWH Usenet Archive (https://usenet.blueworldhosting.com)
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"Lasse Langwadt" <
llc@fonz.dk> wrote in message
news:v0c1mg$2is8l$1@dont-email.me...On 4/24/24 22:48, boB wrote:
On Wed, 24 Apr 2024 21:22:07 +0200, Lasse Langwadt <llc@fonz.dk>
wrote:
>
On 4/24/24 04:00, Don Y wrote:
On 4/23/2024 5:08 PM, Edward Rawde wrote:
It must be trivial to get a VHDL/Verilog model and make your own by
now.
>
The problem with all the early/simple/trivial processors is getting
the rest of the system to run as fast as the core can. E.g., running
a core at ~200MHz and expecting the same bus timing means < 5ns memory.
>
(for a Z80, that would be ~10ns as the bus timing is inherently slower)
>
>
how much memory can it address?
>
>
64K
16 bits worth.
>
so in something like and FPGA in is with range of internal ram and memory
speed is not really an issue
Yes. That's where I'd put a Z80 in the unlikely event that I wanted to use
one these days.
Along with RAM, ROM, and anything else it needs.
Zilog stopping Z80 production
Re: Zilog stopping Z80 production
