Re: Anticipating processor architectural evolution

On Sat, 27 Apr 2024 16:11:30 -0700, Don Y
<blockedofcourse@foo.invalid> wrote:

I've had to refactor my RTOS design to accommodate the likelihood of SMT
in future architectures.
>
Thinking (hoping?) these logical cores to be the "closest to the code",
I call them "Processors" (hysterical raisins).  Implicit in SMT is the
notion that they are architecturally similar/identical.
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These are part of PHYSICAL cores -- that I appropriately call "Cores".
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These Cores are part of "Hosts" (ick; term begs for clarity!)... what
one would casually call "chips"/CPUs.  Note that a host can house dissimilar
Cores (e.g., big.LITTLE).
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Two or more hosts can be present on a "Node" (the smallest unit intended to
be added to or removed from a "System").  Again, they can be dissimilar
(think CPU/GPU).
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I believe this covers the composition/hierarchy of any (near) future
system architectures.  And, places the minimum constraints on said.
>
Are there any other significant developments in the pipeline that
could alter my conception of future hardware designs?

Why not hundreds of CPUs on a chip, each assigned to one function,
with absolute hardware protection? They need not be identical, because
many would be assigned to simple functions.

The mess we have now is the legacy of thinking about a CPU as some
precious resource.