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On Thu, 9 May 2024 19:09:14 +0200, Jeroen BellemanSpice has a useful "metastability detector", the simulation slows to a crawl and you can hear the PC's fans start howling from the kitchen
<jeroen@nospam.please> wrote:
On 5/9/24 17:29, bitrex wrote:Most of us did async logic when we were kids, before we found outOn 5/9/2024 10:06 AM, John Larkin wrote:>
>>And I can integrate some other functions, too. Look at all the fun parts>
you get for 40 cents in small quantity. These things have been solid
money-makers for me so far
>
People keep re-inventing the "analog FPGA" but none seem to have been
successful. There must be some deep fundamental reason why.
More briefly, asynchronous mixed-signal design can be annoying as you've
probably experienced. Have to even more carefully consider timings and
race conditions, the lull between clock edges can't save you.
I *like* to use asynchronous state machines in my designs from
time to time. It's not really so different from synchronous
design, and it's a natural solution in many situations. It's
just that setup and hold times apply to more inputs than just
a clock.
>
Jeroen Belleman
about proper state machines and metastability and such.
There are occasional fads for async logic (Intel had one) but they
don't seem to stick either.
People manage to screw up synchronous state machines too!
I recently did a box full of GigaComm picosecond logic, async of
course. A laser modulator. It got us a VIP tour of NIF, with free
lunch.
https://www.dropbox.com/s/m8zc7g56jul39d0/NIF_Tour-Highland%20Tech%20group%20photo%20TC.jpg?raw=1
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