Re: Intel

Am 03.08.24 um 23:52 schrieb Phil Hobbs:

On 2024-08-03 17:47, John Larkin wrote:

On Sat, 03 Aug 2024 17:18:33 -0400, Joe Gwinn <joegwinn@comcast.net>
wrote:
>

On Sat, 03 Aug 2024 12:32:23 -0700, John Larkin
<jjlarkin@highlandtechnology.com> wrote:
>

https://www.nextplatform.com/2024/08/02/the-resurrection-of-intel-will-take-more-than-three-days/?td=rt-3a
>
Looks like they wrecked Altera.

Altera was founded with Intel money, and the Intel Eprom process.
Remember the EP300?

And hung onto the Intel '86 architecture a tad too tightly, for far
too long.

In the last 20 years, Intel processors had nothing to do with the x86
architecture, except that they could accept x86 code after reset.
Inside, they are a bunch of RISCs, and there is no EAX register but
some 100s of renaming registers that all could take the role of EAX,
in case of speculative execution even some of them at the same time.

Joe Gwinn

>
Yes, it's an ancient dog. It's immensely complex to push the X86
architecture for speed, hence the power consumption and all the bugs.

There haven't been a lot of bugs in the last 40 years. If someone gave
up b/c of bugs, it was NS with the 32032 or Motorola with the 68K.
That's what you get with addressing modes like multiple-memory-indirect
where instructions may never terminate because of unlimited page faults
for a single instruction.
All the bugs? Surely you'll mention the fdiv? Has floating point
division anything to do with x86 architecture? When I think of bugs,
I immediately remember the AM9511 floating point coprocessor.
It was next to impossible to get a data sheet and the AM9511 version
for it, and every month a different combination with different bugs.

AMD has been doing it pretty well, for awhile.  The X86_64 architecture was theirs, for instance--Intel was still pushing Itanium, alias Itanic.

... which really was HP's brainchild.
I wonder how the iapx432 would perform with current cache technology.

Cheers

Gerhard