Re: Guard Traces

On Mon, 26 Aug 2024 12:44:31 +0100, Cursitor Doom <cd@notformail.com>
wrote:

Anyone still believe in 'em?

Sometimes, they make sense.

For picoamp or femtoamp measurements, an actively driven guard can
reduce surface leakage errors. Or reduce capacitive coupling from
other traces.

Sometimes two fast signals might crosstalk, so a grounded guard trace
between them helps, and can make both traces into matched-impedance
coplanar waveguide.  Lots of vias on the guard, of course.

Either case is rare.

I suppose there is a planar trace geometry with a ground on one side,
a lopsided CPW. That would be fairly dispersive, which is I guess why
it doesn't have a name. We occasionally use ATLC to analyze such
impedances, but it doesn't calculate dispersion.

Last year I designed a low-jitter triggered 50 MHz LC oscillator. FR4
is about the world's worst capacitor (tempco around +900 PPM) so I
needed to reduce the capacitance of the critical node. I did a proto
PCB, and one version had a layer 2 actively driven guard, as a pour
under the region. That didn't work well, the way I did it.