Re: DDS filters

On Wed, 18 Sep 2024 16:48:36 +1000, Bill Sloman <bill.sloman@ieee.org>
wrote:

On 18/09/2024 8:48 am, john larkin wrote:

I can use an Efinix FPGA and a bunch of cheap fast DACs to make some
DDS clock sources, specifically four. The pain is the lowpass filter.
 
Mini-Circuits and other folks make nice surface-mount lowpass filters,
but they are most all in the GHz range. I want maybe 25 MHz. You'd
think there would be a market for packaged MHz-range lowpsss filters.
 
It's worth pushing the DAC rate as high as possible to simplify the
lowpass filter. Stay far away from Nyquist.

>
That kind of circuit cries out for finite impulse response low pass filter.
>
You feed the digital signal through a shift register and hang sampling
resistors on each tap, and sum the currents fed through the resistors.
You do have to watch out for truncation error - Gibb's oscillations -
and use a Hamming window when you calculate the value for each sampling
resistor.
>
The neat thing about it is that it is essentially frequency independent
- the cut -off frequency scales with the clock rate.
>
It's sort of bulky - my 32-stage example need two or three E-96
precision resistors per tap to get the precision you need, but in
surface mount that's tolerable.
>
Shorter shift registers don't cut off as sharply but can still do much
better than analog parts.

It's interesting that there is a class of people who want to do
totally impractical expensive things on circuit boards. People with no
common sense. The name for such people is "fired."

Also, a DDS lowpass filter can have ghasty passband response. What
matters is stopband rejection. All the classic filter responses try to
optimize passband flatness.

The jitter of a DDS at low frequencies is domnated by the number of
MSB bits that we pick from the phase accumulator. It's usually better
to synthesize a clean octave and divide down as needed.