Re: Random thoughts on sinewave oscillators

"Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vf20si$96u8$1@dont-email.me...

On 20/10/2024 3:36 am, Edward Rawde wrote:

"Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vevqip$3q3dn$1@dont-email.me...

On 19/10/2024 2:03 pm, Edward Rawde wrote:

"john larkin" <JL@gct.com> wrote in message news:j656hjp1rq659uh61k3q75bipaf386qqh1@4ax.com...

On Fri, 18 Oct 2024 18:58:43 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:
>

"Jeroen Belleman" <jeroen@nospam.please> wrote in message news:veumn5$3fbqu$1@dont-email.me...

On 10/18/24 23:19, Edward Rawde wrote:

"Cursitor Doom" <cd999666@notformail.com> wrote in message news:veuirv$3cmo3$10@dont-email.me...

On Fri, 18 Oct 2024 15:59:09 -0400, Edward Rawde wrote:
>

"Cursitor Doom" <cd999666@notformail.com> wrote in message
news:veucs2$3cmo3$9@dont-email.me...

On Fri, 18 Oct 2024 14:20:48 -0400, Edward Rawde wrote:
>

"Cursitor Doom" <cd999666@notformail.com> wrote in message
news:veu7kt$3cmo3$8@dont-email.me...

On Fri, 18 Oct 2024 13:47:02 -0400, Edward Rawde wrote:
>

"Cursitor Doom" <cd999666@notformail.com> wrote in message
news:veu45s$3cmo3$5@dont-email.me...

On Fri, 18 Oct 2024 11:25:19 -0400, Edward Rawde wrote:
>

"piglet" <erichpwagner@hotmail.com> wrote in message
news:vetde5$38sbk$1@dont-email.me...

Edward Rawde <invalid@invalid.invalid> wrote:

>

...

>
Without doubt, it's the trickiest aspect of the design. Definitely do-able
though. Let us know how you get on.
>

>
Ok. This simple circuit is based on the circuit you can find here.
>
https://electronics.stackexchange.com/questions/697687/how-to-control-the-amplitude-of-a-wien-bridge-oscillator
>
It produces a something wave.
I wouldn't call it sine but at least it's not clipping.
What's going on here?
>
Version 4

[Snip...]
>
You're hitting the flat portion of the Id vs. Vds curve around the
top of the wave. In that region the dynamic resistance of the FET
is very large, and therefore the gain of the opamp drops to about
one. As a result, the positive tip of the output gets sort-of
squashed.
>
There are probably ways to fix this, for example by feeding a
portion of the output signal to the FET gate, but a quick
attempt I made didn't work very well. This is why FETs aren't so
great as gain setting elements.
>
Using a lightbulb --or more generally a PTC resistor-- for R7 is
really hard to beat.

>
Ok thanks Jeroen.
>
It looks like the best approach for the gain control is either a filament or something like that used in the document Bill
Sloman
posted.
>
https://www.analog.com/media/en/technical-documentation/application-notes/AN132f.pdf

>
Note that the LDR has a very small influence range on the loop gain.
>

>
That's why I added R3 in this circuit.
It does not seem to be safe to reduce R3 below 1k.
>
R4 helps a lot too for reasons I don't fully understand.
It may be moving the FET to a better part of its operating characteristics.
>
A single rail version also works with another op amp producing 6V for R4 and two 20k resistors for R2 between 12V and 0V.
As expected, this produces twice the output voltage and I've not found a way to reduce it.
>
This will probably be my final offering for a 1KHz sinewave oscillator unless anyone can suggest improvements without using
light
dependent resistors.
  From the LTSpice plot, I can't discern any impurity in the signal this circuit produces.
It would be interesting to see what a real circuit and a spectrum analyzer says but I probably won't be building it.
>
I haven't used an LDR since playing with an ORP12 around age 10.
I seem to remember that they can degrade over time but maybe that only happens in sunlight.

>
I got your earlier circuit to work a lot better simply by increasing R7 to 5.6k. If you use the View option on the trace viewing
panel to pull out an FFT of the output (I use Blackmann-Harris windowing) from 10sec to 20 sec, you can see that second harmonic
distortion is about 20dB below the primary - not great but better than it was.
>
And the waveform looks like a sine wave.
>
The less influence the FET has on the gain of the circuit, the better the sine wave.

>
If you run this circuit then View, FFT, Use current zoom extent, Ok
It implies that unwanted harmonics are 40dB down.
I'm not sure I believe that but if true then it's not bad for a very low cost circuit.

>
<snipped .asc file>
>
The revised .asc file is a bit of a mess. You've added R11 to get the output frequency close to 1KHz.
>
What you should have done is to have used 0.1% 10.5k resistors -it's an E96 value and you can buy them off the shelf - at R1 and
R2.

That would be fine in reality but so far this is only simulation.

>
That got me to 1.001kHz.
>
Since the capacitors at C1 and C2 can at best only be +/-1% tolerance parts - you can't buy anything better off the shelf - this
is quite close enough.
>
You can use a trimming potentiometer to get closer to the target frequency, but that does have its downsides.
>
R4 certainly does make the circuit settle faster - how is a bit of a mystery

So I'd leave it in.

but you've created a total mess with R5,R7, R8, and R10. It's not clear what you were trying to do.

R10 was experimental like R4 and has been removed.

>
I found that I could get by without R4 provided that I stuck with sensible resistance values at R7 and R8 - R7 went up to 6.2k and
I put 330R across J1.
>

If I wanted to build this for experimental purposes I'd have R4 150 ten turn and R5 100k ten turn.
I'd also do it through hole.

If I were you I wouldn't get too excited over what, so far, is only a simulation.
It could be bad for your blood pressure.
I think reality would be a very different matter if the circuit were built for real but I don't have a suitable spectrum analyzer so
there isn't much point doing that.

Is this better?
I still can't do better than 40dB for unwanted harmonics no matter what I do.
Except perhaps filter the output. Maybe a notch at 2KHz.

Version 4
SHEET 1 2196 916
WIRE -160 -304 -256 -304
WIRE -16 -304 -160 -304
WIRE 160 -304 -16 -304
WIRE 400 -304 224 -304
WIRE -160 -272 -160 -304
WIRE 400 -272 400 -304
WIRE -256 -256 -256 -304
WIRE -16 -208 -16 -304
WIRE -256 -160 -256 -192
WIRE -256 -160 -288 -160
WIRE -160 -160 -160 -192
WIRE -160 -160 -256 -160
WIRE -80 -160 -160 -160
WIRE -48 -160 -80 -160
WIRE 80 -160 48 -160
WIRE 112 -160 80 -160
WIRE 240 -160 192 -160
WIRE 272 -160 240 -160
WIRE 400 -160 400 -192
WIRE 400 -160 352 -160
WIRE -288 -112 -288 -160
WIRE -80 -96 -80 -160
WIRE -48 -96 -80 -96
WIRE 80 -96 80 -160
WIRE 80 -96 32 -96
WIRE 240 -48 240 -160
WIRE 240 -48 48 -48
WIRE 272 -48 240 -48
WIRE 400 -48 400 -160
WIRE 400 -48 352 -48
WIRE -384 32 -512 32
WIRE 128 32 -384 32
WIRE -512 80 -512 32
WIRE 128 96 128 32
WIRE -384 112 -384 32
WIRE 48 112 48 -48
WIRE 96 112 48 112
WIRE 384 128 160 128
WIRE 400 128 400 -48
WIRE 400 128 384 128
WIRE 528 128 400 128
WIRE 608 128 528 128
WIRE 96 144 -80 144
WIRE -80 224 -80 144
WIRE 16 224 -80 224
WIRE 176 224 16 224
WIRE 256 224 240 224
WIRE 384 224 384 128
WIRE 384 224 336 224
WIRE -80 240 -80 224
WIRE 16 240 16 224
WIRE -512 320 -512 160
WIRE -512 320 -592 320
WIRE -592 336 -592 320
WIRE -512 336 -512 320
WIRE -384 336 -384 176
WIRE -384 336 -512 336
WIRE -368 336 -384 336
WIRE -288 336 -288 -32
WIRE -288 336 -368 336
WIRE -80 336 -80 320
WIRE -80 336 -288 336
WIRE 16 336 16 304
WIRE 16 336 -80 336
WIRE -512 464 -512 336
WIRE -368 496 -368 336
WIRE -512 656 -512 544
WIRE -368 656 -368 560
WIRE -368 656 -512 656
WIRE 128 656 128 160
WIRE 128 656 -368 656
FLAG 528 128 output
FLAG -592 336 0
DATAFLAG -464 32 "round(($)*100)/100"
SYMBOL voltage -512 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 10 135 Left 2
WINDOW 0 12 7 Left 2
WINDOW 3 15 104 Left 2
SYMATTR SpiceLine Rser=0.1
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 352 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL cap 240 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 15n
SYMBOL cap 32 304 R180
WINDOW 0 -33 54 Left 2
WINDOW 3 -49 18 Left 2
SYMATTR InstName C2
SYMATTR Value 15n
SYMBOL polcap -400 112 R0
SYMATTR InstName C4
SYMATTR Value 100�
SYMBOL OpAmps\LT1057 128 64 R0
SYMATTR InstName U2
SYMBOL res -176 -288 R0
SYMATTR InstName R6
SYMATTR Value 47k
SYMBOL res 208 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 6.2k
SYMBOL res 368 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R8
SYMATTR Value 15k
SYMBOL diode 160 -288 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 384 -288 R0
SYMATTR InstName R9
SYMATTR Value 1k
SYMBOL njf 48 -208 R90
WINDOW 0 -39 17 VRight 2
WINDOW 3 -10 -13 VRight 2
SYMATTR InstName J1
SYMATTR Value J112
SYMBOL voltage -512 448 R0
WINDOW 123 0 0 Left 0
WINDOW 39 10 135 Left 2
WINDOW 0 12 7 Left 2
WINDOW 3 15 104 Left 2
SYMATTR SpiceLine Rser=0.1
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL polcap -384 496 R0
SYMATTR InstName C5
SYMATTR Value 100�
SYMBOL res -96 224 R0
SYMATTR InstName R2
SYMATTR Value 12k
SYMBOL polcap -240 -192 R180
WINDOW 0 -35 53 Left 2
WINDOW 3 -47 17 Left 2
SYMATTR InstName C3
SYMATTR Value 10�
SYMBOL res 48 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 330
SYMBOL res -272 -16 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 82
SYMBOL res 368 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 80k
TEXT -496 352 Left 2 !.tran 0 2 1 startup
TEXT -536 -392 Left 2 ;Edward Rawde's 1KHz sinewave oscillator. 20 Oct 2024.\nCan the sine purity be improved any further?